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PSMN040-200W,127 PDF预览

PSMN040-200W,127

更新时间： 2024-11-25 06:15:19
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
7页 86K
描述
PSMN040-200W - N-channel TrenchMOS SiliconMAX standard level FET@en-us TO-247 3-Pin

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PSMN040-200W,127 数据手册

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Philips Semiconductors  
Product specification  
N-channel TrenchMOS transistor  
PSMN040-200W  
FEATURES  
SYMBOL  
QUICK REFERENCE DATA  
d
• ’Trench’ technology  
• Very low on-state resistance  
• Fast switching  
VDSS = 200 V  
ID = 50 A  
• Low thermal resistance  
g
RDS(ON) ≤ 40 mΩ  
s
GENERAL DESCRIPTION  
PINNING  
SOT429 (TO247)  
SiliconMAXproductsusethelatest  
Philips Trench technology to  
achieve the lowest possible  
on-state resistance in each  
package at each voltage rating.  
PIN  
DESCRIPTION  
1
2
gate  
drain  
Applications:-  
• d.c. to d.c. converters  
• switched mode power supplies  
3
source  
drain  
2
tab  
1
3
The PSMN040-200W is supplied in  
the SOT429 (TO247) conventional  
leaded package.  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDSS  
VDGR  
VGS  
ID  
Drain-source voltage  
Drain-gate voltage  
Gate-source voltage  
Continuous drain current  
Tj = 25 ˚C to 175˚C  
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ  
-
-
-
-
-
-
-
200  
200  
± 20  
50  
V
V
V
A
A
A
W
˚C  
Tmb = 25 ˚C  
Tmb = 100 ˚C  
Tmb = 25 ˚C  
Tmb = 25 ˚C  
36  
IDM  
PD  
Tj, Tstg  
Pulsed drain current  
Total power dissipation  
Operating junction and  
storage temperature  
200  
300  
175  
- 55  
AVALANCHE ENERGY LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
EAS Non-repetitive avalanche  
CONDITIONS  
MIN.  
MAX.  
UNIT  
Unclamped inductive load, IAS = 50 A;  
tp = 100 µs; Tj prior to avalanche = 25˚C;  
-
661  
mJ  
energy  
VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer  
to fig:15  
IAS  
Non-repetitive avalanche  
current  
-
50  
A
August 1999  
1
Rev 1.000  
1234567

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PSMN040-200W,127 替代型号

型号 品牌 替代类型 描述 数据表
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