Datasheet > PSMN7R5-60YL

PSMN7R5-60YL

更新时间： 2024-11-22 11:10:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	762K
描述
N-channel 60 V, 7.5 mΩ logic level MOSFET in LFPAK56Production

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PSMN7R5-60YL 数据手册

PSMN7R5-60YL

N-channel 60 V, 7.5 mΩ logic level MOSFET in LFPAK56

20 November 2015

Product data sheet

1. General description

Logic level N-channel MOSFET in an LFPAK56 (Power SO8) package using TrenchMOS

technology. This product is designed and qualified for use in a wide range of power

supply & motor control equipment.

2. Features and benefits

Advanced TrenchMOS provides low R_DSonand low gate charge

Logic level gate operation

Avalanche rated, 100% tested

•

LFPAK provides maximum power density in a Power SO8 package

3. Applications

Synchronous rectifier in LLC topology

Chargers & adaptors with V_out< 10 V

Fast charge & USB-PD applications

Battery powered motor control

•

LED lighting & TV backlight

4. Quick reference data

Table 1.

Symbol

Quick reference data

Parameter

Conditions

Min

Typ

Max

Unit

V_DS

I_D

drain-source voltage

drain current

T_j≥ 25 °C; T_j≤ 175 °C

V_GS= 5 V; T_mb= 25 °C; Fig. 2

P_tot

T_j

total power dissipation T_mb= 25 °C; Fig. 1

junction temperature

147

175

-55

°C

Static characteristics

R_DSondrain-source on-state

resistance

Dynamic characteristics

Q_G(tot)total gate charge

V_GS= 10 V; I_D= 20 A; T_j= 25 °C;

Fig. 11

7.5

mΩ

V_GS= 10 V; I_D= 20 A; V_DS= 48 V;

T_j= 25 °C; Fig. 13; Fig. 14

60.6

9.7

Q_GD

gate-drain charge

V_GS= 5 V; I_D= 20 A; V_DS= 48 V;

T_j= 25 °C; Fig. 13; Fig. 14

12 3 4 5 6 7...13

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