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PSMN7R5-60YL PDF预览

PSMN7R5-60YL

更新时间: 2024-09-16 11:10:31
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
13页 762K
描述
N-channel 60 V, 7.5 mΩ logic level MOSFET in LFPAK56Production

PSMN7R5-60YL 数据手册

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PSMN7R5-60YL  
N-channel 60 V, 7.5 mΩ logic level MOSFET in LFPAK56  
20 November 2015  
Product data sheet  
1. General description  
Logic level N-channel MOSFET in an LFPAK56 (Power SO8) package using TrenchMOS  
technology. This product is designed and qualified for use in a wide range of power  
supply & motor control equipment.  
2. Features and benefits  
Advanced TrenchMOS provides low RDSonand low gate charge  
Logic level gate operation  
Avalanche rated, 100% tested  
LFPAK provides maximum power density in a Power SO8 package  
3. Applications  
Synchronous rectifier in LLC topology  
Chargers & adaptors with Vout < 10 V  
Fast charge & USB-PD applications  
Battery powered motor control  
LED lighting & TV backlight  
4. Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
60  
Unit  
V
VDS  
ID  
drain-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
VGS = 5 V; Tmb = 25 °C; Fig. 2  
-
-
-
-
-
-
86  
A
Ptot  
Tj  
total power dissipation Tmb = 25 °C; Fig. 1  
junction temperature  
-
147  
175  
W
-55  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
QG(tot) total gate charge  
VGS = 10 V; ID = 20 A; Tj = 25 °C;  
Fig. 11  
-
6
7.5  
mΩ  
VGS = 10 V; ID = 20 A; VDS = 48 V;  
Tj = 25 °C; Fig. 13; Fig. 14  
-
-
60.6  
9.7  
-
-
nC  
nC  
QGD  
gate-drain charge  
VGS = 5 V; ID = 20 A; VDS = 48 V;  
Tj = 25 °C; Fig. 13; Fig. 14  
 
 
 
 

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