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PSMN8R5-40MSD PDF预览

PSMN8R5-40MSD

更新时间: 2024-09-17 11:15:11
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
12页 301K
描述
N-channel 40 V, 8.5 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technologyProduction

PSMN8R5-40MSD 数据手册

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PSMN8R5-40MSD  
N-channel 40 V, 8.5 mΩ, standard level MOSFET in LFPAK33  
using NextPower-S3 technology  
10 February 2020  
Product data sheet  
1. General description  
60 A, standard level N-channel enhancement mode MOSFET in 175 °C LFPAK33 package using  
advanced TrenchMOS Superjunction technology. This product has been designed and qualified for  
high efficiency applications at high switching frequencies.  
2. Features and benefits  
Avalanche rated, 100% tested  
NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery'  
Low QRR, QG and QGD for high system efficiency, especially at high switching frequencies  
Low spiking and ringing for low EMI designs  
High reliability clip bonded and solder die attach Mini Power SO8 package; no glue, no wire  
bonds, qualified to 175 °C  
Exposed leads can be wave soldered, visual solder joint inspection and high quality solder  
joints  
Low parasitic inductance and resistance  
3. Applications  
Secondary side synchronous rectification  
DC-to-DC converters  
Brushless DC motor drive  
LED lighting  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
VDS  
ID  
Parameter  
Conditions  
Min  
Typ  
Max  
40  
Unit  
V
drain-source voltage  
drain current  
25 °C ≤ Tj ≤ 175 °C  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
-
-
-
-
-
[1]  
-
60  
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 1  
junction temperature  
-
59  
W
Tj  
-55  
175  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
VGS = 10 V; ID = 15 A; Tj = 25 °C;  
Fig. 10  
-
7.4  
8.5  
mΩ  
QGD  
gate-drain charge  
total gate charge  
ID = 15 A; VDS = 20 V; VGS = 10 V;  
Fig. 12; Fig. 13  
0.6  
9
2
4
nC  
nC  
QG(tot)  
13.4  
19  
[1] 60A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,  
thermal design and operating temperature.  
 
 
 
 
 

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