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NTMD4102PR2G PDF预览

NTMD4102PR2G

更新时间: 2024-09-15 19:16:11
品牌 Logo 应用领域
安森美 - ONSEMI 开关脉冲光电二极管晶体管
页数 文件大小 规格书
4页 43K
描述
6.5A, 20V, 0.019ohm, 2 CHANNEL, P-CHANNEL, Si, POWER, MOSFET, CASE 751-07, SOIC-8

NTMD4102PR2G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT包装说明:CASE 751-07, SOIC-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99风险等级:5.84
配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE最小漏源击穿电压:20 V
最大漏极电流 (ID):6.5 A最大漏源导通电阻:0.019 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-G8
元件数量:2端子数量:8
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:P-CHANNEL最大脉冲漏极电流 (IDM):30 A
认证状态:Not Qualified表面贴装:YES
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

NTMD4102PR2G 数据手册

 浏览型号NTMD4102PR2G的Datasheet PDF文件第2页浏览型号NTMD4102PR2G的Datasheet PDF文件第3页浏览型号NTMD4102PR2G的Datasheet PDF文件第4页 
NTMD4102PR2  
Product Preview  
Trench Power MOSFET  
-20 V, P-Channel, SO-8 Dual  
This P-Channel device was designed using ON Semiconductor’s  
leading edge trench technology for low R  
performance in the  
DS(on)  
http://onsemi.com  
SO-8 dual package for high power and current handling capability.  
The low R performance is particularly suited for game systems,  
DS(on)  
notebook and desktop computers, and printers.  
VBR(DSS) = -20 VOLTS  
RDS(on) (max) = 19 mW @ -10 V  
ID(max) (Note 1) = -8.5 A  
Features & Benefits  
Leading -20 V Trench for Low R  
DS(on)  
R
DS(on) (max) = 30 mW @ -4.5 V  
SO-8 Package Provides Excellent Thermal Performance  
Surface Mount SO-8 Package Saves Board Space  
Pb Free Package for Green Manufacturing  
ID(max) (Note 1) = -6.5 A  
Applications  
P-Channel MOSFET  
S
Load/Power Management  
Battery Switching for Multi Cell Li-Ion  
Buck-Boost Synchronous Rectification  
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
Drain Current  
Symbol  
Value  
-20  
Unit  
V
V
DSS  
D
V
GS  
±20  
V
A
- Continuous @ T = 25°C (Note 1)  
- Pulsed Drain Current (t = 10 µs)  
I
-6.5  
-30  
A
D
MARKING DIAGRAM &  
PIN ASSIGNMENT  
I
DM  
Steady State Power Dissipation  
P
D
1.1  
W
8
@ T = 25°C (Note 1)  
A
1
8
Source-1  
Gate-1  
Source-2  
Gate-2  
Drain-1  
Drain-1  
Drain-2  
Drain-2  
Operating Junction and Storage Temperature  
Range  
T , T  
-55 to  
150  
°C  
1
J
stg  
SO-8  
Continuous Source Current (Body Diode)  
I
S
-0.9  
260  
A
CASE 751  
STYLE 12  
Top View  
Lead Temperature for Soldering Purposes  
T
L
°C  
(1/8from case for 10 seconds)  
XXX = Specific Device Code  
THERMAL RESISTANCE RATINGS  
A
L
Y
W
= Assembly Location  
= Wafer Lot  
= Year  
Thermal Resistance  
°C/W  
- Junction- to- Ambient - Steady State (Note 1)  
- Junction-to-Ambient - t 10 s (Note 1)  
- Junction-to-Lead - Steady State (Note 2)  
R
R
R
TBD  
TBD  
TBD  
q
q
JA  
JA  
= Work Week  
q
JL  
1. Surface-mounted on FR4 board using 1sq pad size (Cu area = 1.127 in sq  
[1 oz] including traces)  
ORDERING INFORMATION  
2. Surface-mounted on FR4 board using the minimum recommended pad size  
(Cu area = TBD in sq)  
Device  
Package  
Shipping  
2500/Tape & Reel  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
NTMD4102PR2  
SO-8  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
March, 2003 - Rev. 0  
NTMD4102PR2/D  

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