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FDD6N50TM_10 PDF预览

FDD6N50TM_10

更新时间: 2024-11-06 12:23:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 946K
描述
500V N-Channel MOSFET

FDD6N50TM_10 数据手册

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November 2010  
FDD6N50TM_F085  
500V N-Channel MOSFET  
Features  
Description  
6A, 500V, RDS(on) = 0.9@VGS = 10 V  
Low gate charge ( typical 12.8 nC)  
Low Crss ( typical 9 pF)  
Fast switching  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary, planar  
stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the avalanche  
and commutation mode. These devices are well suited for high  
efficient switched mode power supplies and active power factor  
correction.  
100% avalanche tested  
Improved dv/dt capability  
Qualified to AEC Q101  
RoHS Compliant  
D
D
G
G
S
D-PAK  
S
Absolute Maximum Ratings  
Symbol  
Parameter  
Ratings  
Unit  
VDSS  
Drain-Source Voltage  
Drain Current  
500  
V
ID  
- Continuous (TC = 25°C)  
- Continuous (TC = 100°C)  
6
3.8  
A
A
(Note 1)  
(Note 2)  
IDM  
Drain Current  
- Pulsed  
24  
±30  
270  
6
A
V
VGSS  
EAS  
IAR  
Gate-Source voltage  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
(Note 1)  
(Note 1)  
(Note 3)  
EAR  
dv/dt  
PD  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
8.9  
4.5  
mJ  
V/ns  
Power Dissipation  
(TC = 25°C)  
89  
W
- Derate above 25°C  
0.71  
W/°C  
TJ, TSTG  
TL  
Operating and Storage Temperature Range  
-55 to +150  
300  
°C  
Maximum Lead Temperature for Soldering Purpose,  
1/8” from Case for 5 Seconds  
°C  
Thermal Characteristics  
Symbol  
Parameter  
Min.  
Max.  
1.4  
Unit  
°C/W  
°C/W  
RθJC  
RθJA  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient  
--  
--  
83  
©2010 Fairchild Semiconductor Corporation  
FDD6N50TM_F085 Rev. C1  
1
www.fairchildsemi.com  

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