TC358743XBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC358743XBG
Mobile Peripheral Devices
Overview
The HDMI®-RX to MIPI® CSI-2-TX is a bridge device that converts HDMI
stream to MIPI CSI-2 TX.
The current and next generation Application Processors and Baseband chips
have been designed without video streaming input port except CSI-2 for
Camcorder input. Smart Phone Processors are being used in several
applications that required Video Input
P-TFBGA64-0606-0.65-001
Weight: 76 mg (Typ.)
TC358743XBG takes in HDMI input and converts to CSI-2 that looks like a Camcorder input.
Features
● HDMI-RX Interface
● Audio Output Interface
HDMI 1.4
Either I2S or TDM Audio interface available (pins
are multiplexed)
- Video Formats Support (Up to 1080P @60fps)
RGB, YCbCr444: 24-bpp @60fps
YCbCr422 24-bpp @60fps
- Audio Supports
I2S Audio Interface
Single data lane for stereo data
Support Master Clock mode only
Internal Audio PLL to track N/CTS value
Support 16, 18, 20 or 24-bit data (depend on
transmitted by the ACR packet.
HDMI input stream)
- 3D Support
- Support HDCP
Support Left or Right-justify with MSB first
Support 32 bit-wide time-slot only
- DDC Support
- EDID Support
Output Audio Oversampling clock (256fs)
TDM (Time Division Multiplexed) Audio Interface
Release A, Revision 1 (Feb 9, 2000)
First 128 byte (EDID 1.3 structure)
Fixed to 8 channels (depend on HDMI input
stream)
First E-EDID Extension: 128 bytes of CEA
Support 32 bit-wide time slot only
Support Master Clock mode only
Extension version 3 (specified in CEA-861-D)
Embedded 1K-byte SRAM (EDID_SRAM)
- Maximum HDMI clock speed: 165 MHz
Support 16, 18, 20 or 24-bit PCM audio data
word (depend on HDMI input stream)
Does not support Audio Return Path and HDMI
Output Audio Oversampling clock (256fs)
● InfraRed (IR)
Ethernet Channels
● CSI-2 TX Interface
MIPI CSI-2 compliant (Version 1.01 Revision
0.04 – 2 April 2009)
Supports up to 1 Gbps per data lane
Support NEC Infrared protocol.
● System
Internal core has two power domains (VDDC1
and VDDC2)
- Video, Audio and InfoFrame data can be
transmit over MIPI CSI-2
Supports up to 4 data lanes
● I2C Slave Interface
Support for Normal-mode (100 kHz) and Fast-
mode (400 kHz)
Support Ultra Fast-mode (2 MHz)
- VDDC1 is always on power domain
- VDDC2 can be shut-off during deep sleep mode
● Power supply inputs
Core and MIPI D-PHY: 1.2 V
I/O: 1.8V – 3.3 V
HDMI: 3.3 V
APLL: 3.3 V/2.5 V
● Power Consumption during typical operations
720P: 0.48 W
Configure all TC358743XBG internal registers
1080P @30fps: 0.48 W
1080P @60fps: 0.54 W
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2016-4-1
© 2014 Toshiba Corporation