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TC358749XBG PDF预览

TC358749XBG

更新时间： 2024-09-14 20:10:15
品牌 Logo 应用领域
东芝 - TOSHIBA 商用集成电路
页数 文件大小 规格书
18页 717K
描述
Mobile Peripheral Bridge Chip IC

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中文翻译

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TC358749XBG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：VFBGA,Reach Compliance Code：unknown
风险等级：5.8商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PBGA-B80长度：7 mm
功能数量：1端子数量：80
最高工作温度：70 °C最低工作温度：-30 °C
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装形状：SQUARE封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1 mm
最大供电电压 (Vsup)：1.3 V最小供电电压 (Vsup)：1.1 V
表面贴装：YES技术：CMOS
温度等级：OTHER端子形式：BALL
端子节距：0.65 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7 mm
Base Number Matches：1

TC358749XBG 数据手册

 浏览型号TC358749XBG的Datasheet PDF文件第2页浏览型号TC358749XBG的Datasheet PDF文件第3页浏览型号TC358749XBG的Datasheet PDF文件第4页浏览型号TC358749XBG的Datasheet PDF文件第5页浏览型号TC358749XBG的Datasheet PDF文件第6页浏览型号TC358749XBG的Datasheet PDF文件第7页 
TC358749XBG  
CMOS Digital Integrated Circuit Silicon Monolithic  
TC358749XBG  
TC358749XBG  
Mobile Peripheral Devices  
Overview  
The HDMI-RX to MIPI CSI-2-TX is a bridge device that converts  
HDMI® stream to MIPI® CSI-2 while providing de-interlacing and  
auto-scaling features. TC358749XBG shares the same 80-pin package  
as that of TC358779XBG.  
P-VFBGA80-0707-0.65-001  
Weight: 77mg (Typ.)  
Features  
● HDMI-RX Interface  
Support 32 bit-wide time-slot only  
HDMI 1.4b  
Output Audio Over Sampling clock (256fs)  
Support IEC 60958 & 61937 formats (depending  
upon HDMI input stream) over I2S  
Supports HBR audio stream split across 4 I2S lines if  
bandwidth higher than 12 MHz  
- Video Formats Support (Up to 1080p @60fps)  
RGB, YCbCr444: 24-bpp @60fps  
YCbCr422 24-bpp @60fps  
- Audio Supports  
Internal Audio PLL to track N/CTS value  
transmitted by the ACR packet.  
- 3D Support  
- HDCP1.4a Support  
- EDID Support  
● TDM (Time Division Multiplexed) Audio Interface  
Fixed to 8 channels  
Support Master Clock mode only  
Support 16, 18, 20 or 24-bit PCM audio data word  
(depend on HDMI input stream)  
Release A, Revision 1 (Feb 9, 2000)  
First 128 byte (EDID 1.3 structure)  
First E-EDID Extension: 128 bytes of CEA  
Extension version 3 (specified in CEA-861-D)  
Embedded 1K-byte SRAM (EDID_SRAM)  
- Maximum HDMI clock speed: 165 MHz  
Does not support Audio Return Path and HDMI  
Ethernet Channels  
Support 32 bit-wide time slot only  
Output Audio OverSampling clock (256fs)  
● Digital Audio Interface  
Supports 2 channels (any 2 of the total 8) (depend on  
HDMI input stream)  
Support IEC 60958 & 61937 formats (depending  
upon HDMI input stream)  
● SLIMbus Audio Interface  
Up to 8-channel data (2, 4, 6 or 8)  
Supports Active Framer (Host) mode as well as  
active framer outside the chip  
● CSI-2 TX Interface  
MIPI CSI-2 compliant (Version 1.1 22 November  
2011)  
Active Manager is not supported.  
Supports Isochronous, Pushed & Pulled protocols  
- Isochronous protocol supported only in Active  
manager scenario  
Supports up to 4 data lanes @1Gbps/lane  
Supports video data formats  
- RGB888, RGB666, YCbCr422* 16 & 24bit and  
YCbCr444  
Supports up to 28.8 MHz Root Clock Frequency (in  
Active Framer mode)  
Supports up to 22 MHz clock frequency on Clk lane  
(in Active Framer mode)  
● Video Processing  
Input formats accepted:  
*: YCbCr422 is not available if Video Processing  
Module is used.  
● I2C Slave Interface  
Support for normal (100 kHz), fast mode (400  
kHz) and ultra-fast mode (2 MHz)  
Configure all TC358749 XBG internal registers  
Support 2 I2C Slave Addresses (7’h0F & 7’h1F)  
selected through boot-strap pin (INT)  
● Audio Output Interface  
- RGB or YCbCr422  
- Interlaced or Progressive  
- 2D or 3D  
- Limited to 165 MHz PClk, 640x480, 720x480,  
720x576, 1280x720, 1920x1080 or 1920x1200 are  
expected when scalar is used  
Any of the four audio interfaces are available: I2S,  
TDM, IEC60958 or SLIMbus (pins are  
multiplexed)  
Output formats supported:  
I2S Audio Interface  
- RGB888, RGB666,YCbCr444 or YCbCr422  
- Interlaced (in case of no video processing) or  
Progressive  
Up to 4 data lanes for 8-channel data  
Support Master Clock mode only  
Support 16, 18, 20 or 24-bit data (depend on HDMI  
input stream)  
- 2D or 3D  
- Limited by 4Gbps D-PHY bandwidth, 720x480,  
Support Left or Right-justify with MSB first  
1280x720, 1920x1080 or 1920x1200 note1 are  
1 / 18  
2016-02-04  
© 2014 Toshiba Corporation  
1234567...18

中文翻译

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