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TC358768AXBG PDF预览

TC358768AXBG

更新时间: 2024-11-06 14:56:47
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
19页 409K
描述
smartphone / tablet / Ultrabook™

TC358768AXBG 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:VFBGA,Reach Compliance Code:unknown
Factory Lead Time:16 weeks风险等级:5.68
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PBGA-B72
长度:5 mm功能数量:1
端子数量:72最高工作温度:85 °C
最低工作温度:-30 °C封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装形状:SQUARE
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1 mm最大供电电压 (Vsup):1.3 V
最小供电电压 (Vsup):1.1 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.4 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

TC358768AXBG 数据手册

 浏览型号TC358768AXBG的Datasheet PDF文件第2页浏览型号TC358768AXBG的Datasheet PDF文件第3页浏览型号TC358768AXBG的Datasheet PDF文件第4页浏览型号TC358768AXBG的Datasheet PDF文件第5页浏览型号TC358768AXBG的Datasheet PDF文件第6页浏览型号TC358768AXBG的Datasheet PDF文件第7页 
TC358768AXBG/TC358778XBG  
CMOS Digital Integrated Circuit Silicon Monolithic  
TC358768AXBG/TC358778XBG  
Mobile Peripheral Devices  
TC358768AXBG  
Overview  
Parallel Port to MIPI® DSISM (TC358768AXBG/TC358778XBG) is a  
bridge device that converts RGB to DSI. All internal registers can  
access through I2C or SPI.  
P-VFBGA72-0404-0.40A3  
Weight: 32mg (Typ.)  
TC358778XBG  
P-VFBGA80-0707-0.65-001  
Weight: 68 mg (Typ.)  
Features  
DSI-TX Interface  
- Writing to DCS registers will trigger DCS  
Command transmits over DSI  
MIPI DSI compliant (Version 1.02.00– June  
28, 2010)  
GPIO signals  
- Support DSI Video Mode data transfer  
- DCSSM Command for panel register  
access  
2 GPIO signals  
- Two GPIO signals can be configured as  
SPI signals (SPI_SS and SPI_MISO)  
- Or One GPIO signal can be configured as  
Interrupt output signal, INT.  
Supports up to 1 Gbps per data lane  
Supports1, 2, 3 or 4 data lanes  
Supports video data formats  
- RGB888/666/565  
System  
Clock and power management support to  
RGB Interface  
achieve low power states.  
Supports data formats  
Power supply inputs  
- 24-bit data bus  
Core and MIPI D-PHYSM: 1.2V  
RGB888/666/565 data formats  
Up to 166 MHz input clock  
Support VSYNC/HSYNC polarity option  
(default LOW)  
I/O:  
1.8V – 3.3V  
Typical Power Consumption  
WXGA @60fps: Pixel Clk: 74.25 MHz,  
DSIClk: 312 MHz 66.7 mW  
Support DE polarity option (default High)  
I2C/SPI Slave Interface (Option to select either  
I2C or SPI interface)  
1080P @60fps: Pixel Clk: 148.5 MHz,  
DSIClk: 471 MHz 91.4 mW  
Power Down Condition is achieved by  
turning off clock sources: PClk and RefClk.  
I2C Interface (when CS = L)  
- Support for normal (100 kHz), fast mode  
(400 kHz) and Special mode (1 MHz)  
- Configure all  
TC358768AXBG/TC358778XBG internal  
registers  
- Writing to DCS registers will trigger DCS  
Command transmits over DSI  
SPI interface (when CS = H)  
- SPI interface support for up to 25 MHz  
operation.  
- Configure all  
TC358768AXBG/TC358778XBG internal  
registers  
© 2014-2019  
Toshiba Electronic Devices & Storage Corporation  
1 / 19  
2019-02-08  
Rev. 1.65  

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