TC358767AXBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC358767AXBG
Mobile Peripheral Devices
TC358767AXBG
Overview
TC358767AXBG is a bridge device that enables video streaming from
a Host (application or baseband processor) over MIPI® DSI or DPI link
to drive DisplayPortTM display panels. TC358767AXBG also supports
audio streaming from the host via I2S interface to the Display panels.
TC358767AXBG provides a low power bridge solution to efficiently
translate MIPI® DSI or DPI transfers to DisplayPortTM transfers. As the
P-VFBGA81-0505-0.50-001
Weight: 47mg (Typ.)
DisplayPortTM uses fewer wires compared to other existing display panel standards, it simplifies the LCD
connectivity. The effect of using TC358767AXBG is to enable existing baseband devices supporting DSI or
DPI streaming to connect to new panels supporting DisplayPortTM interface and also to connect to existing
panels over longer distance using DisplayPortTM adaptors at far-end. TC358767AXBG can interface to up
to two independent devices.
Features
● Translates MIPI® DSI/DPI Link video stream
Video input data formats:
from Host to DisplayPortTM Link data to external
display devices.
- RGB-565, RGB-666 and RGB-888.
- New DSI V1.02 Data Type Support: 16-bit
YCbCr 422
● The inputs are driven by a DSI Host with 4-Data
Lanes, upto1 Gbps/lane or DPI Host with
16/18/24 bit interface upto154 MHz parallel
clock.
Interlaced video mode is not supported.
● DPI Receiver
Up to 16 / 18 / 24 bit parallel data interface.
Maximum speed at 154 MPs (MPixel per sec.).
Video input data formats: RGB-565, RGB-666
and RGB-888.
● Embeds audio information from the I2S port into
the DisplayPortTM data stream.
● The output Interface consists of a DisplayPortTM
Only Progressive mode supported.
Tx with a 2-lane Main Link and AUX-Ch.
● Register Configuration: From DSI link or I2C
● I2S Audio Interface: Supports one I2S port for
audio streaming from the host to
interface.
TC358767AXBG.
● Interrupt to host to inform any error status or
Supports slave mode (BCLK, LRCLK & over-
sampling clock input from Host).
Supports sampling frequencies of 32, 44.1, 48,
88.2, 96, 176.4 & 192 kHz.
Supports up to 2 audio channels.
Supports 16, 18, 20 or 24bits per sample.
Optionally inserts IEC60958 status bits and
preamble bits per channel.
status needing attention from Host.
● Internal test pattern (color bar) generator for DP
o/p testing without any video (DSI/DPI) i/p.
● Debug/Test Port: I2C Slave
● DSI Receiver
MIPI® DSI: v1.01 / MIPI® D-PHY: v0.90
Compliant.
● DisplayPortTM Interface: Supports a
DisplayPortTM link from TC358767AXBG to
display panels.
Up to four (4) Data Lanes with Bi-direction
support on Data Lane 0.
Maximum speed at 1 Gbps/lane.
Supports Burst as well as Non-Burst Mode
Video Data.
- Video data packets are limited to one row per
Hsync period.
Supports video stream packets for video data
transmission.
High speed serial bridge chip using VESA
DisplayPortTM 1.1a Standard.
Supports one dual-lane DisplayPortTM port for
high bandwidth applications
Support 1.62 or 2.7 Gbps/lane data rate with
voltage swings @0.4, 0.6, 0.8 or 1.2 V
Support of pre-emphasis levels of 0, 3.5dB and
6dB.
Supports generic long packets for accessing
the chip's register set.
© 2014-2023
Toshiba Electronic Devices & Storage Corporation
1 / 21
2023-07-31
Rev.1.80