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TC35C25 PDF预览

TC35C25

更新时间: 2024-10-02 03:28:47
品牌 Logo 应用领域
TELCOM 信息通信管理控制器
页数 文件大小 规格书
7页 88K
描述
BICMOS PWM CONTROLLERS

TC35C25 数据手册

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4
TC25C25  
TC35C25  
BICMOS PWM CONTROLLERS  
FEATURES  
GENERAL DESCRIPTION  
Low Power BICMOS Construction  
The TC35C25 family of PWM controllers are CMOS  
implementations of the industry standard 3525 voltage  
mode SMPS ICs.  
These second generation CMOS devices employ  
TelCom Semiconductors' Tough BiCMOS process for  
latch-up proof operation. They offer much lower power  
consumption than any of their previous CMOS or bipolar  
counterparts.  
These controllers have separate supply pins for the  
control and output sections of the circuit. This allows "boot-  
strap" operation. The CMOS output stage allows the output  
voltage to swing to within 25mV of either rail.  
Other improved features include tighter hysteresis and  
undervoltage start-up specifications over temperature, and  
very low input bias current on all inputs.  
Low Supply Current at 20 kHz ............... 1.0mA Typ  
Latch-Up Immunity ................. >500mA on Outputs  
Below Rail Input Protection ..............................5V  
High Output Drive ................................ 500mA Peak  
Fast Rise/Fall Time ..................... 50nsec @ 1000pF  
High Frequency Operation .................. Up to 1MHz  
Tri-state Sync Pin for Easy Parallel Operation  
Under Voltage Hysteresis Guaranteed  
Shutdown Pin Available  
Double-Ended  
Soft Start, With Small Cap  
Low Prop Delay Shutdown to  
Output ................................................. 140nsec Typ.  
ORDERING INFORMATION  
Part No.  
Configuration  
Pkg./Temperature  
TC25C25EOE  
Non-Inverting  
16-Pin SOIC (Wide)  
– 40°C to +85°C  
TC25C25EPE  
TC35C25COE  
TC35C25CPE  
Non-Inverting 16-Pin Plastic DIP (Narrow)  
– 40°C to +85°C  
Non-Inverting  
16-Pin SOIC (Wide)  
0°C to +70°C  
Non-Inverting 16-Pin Plastic DIP (Narrow)  
0°C to +70°C  
FUNCTIONAL BLOCK DIAGRAM  
13  
16  
35C25  
V
V
REF  
DD  
11  
A
+
15  
UNDER  
VOLTAGE  
REFERENCE  
REGULATOR  
V
IN  
12  
3
GND  
+4V REF  
OSC OUT  
4
+6V  
SYNC  
6
5
14  
B
R
T
FLIP  
FLOP  
OSC  
C
T
7
DISCH  
R
S
9
COMP  
CMPTR  
PWM  
LATCH  
1
2
R
IN  
+6V  
ERROR  
AMP  
+
IN  
50µA  
8
SOFT  
START  
10  
SHUTDOWN  
TC25/35C25-2 10/1/96  
TELCOM SEMICONDUCTOR, INC.  
4-111  

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