TC358867XBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC358867XBG
Mobile Peripheral Devices
TC358867XBG
Overview
TC358867XBG is a bridge device that enables video streaming from a
Host (application or baseband processor) over MIPI® DSI or DPI link
to drive DisplayPortTM display panels. TC358867XBG also supports
audio streaming from the host via I2S interface to the Display panels.
TC358867XBG provides a low power bridge solution to efficiently
translate MIPI® DSI or DPI transfers to DisplayPortTM transfers. As the
P-VFBGA80-0707-0.65-001
Weight: 76mg (Typ.)
DisplayPortTM uses fewer wires compared to other existing display panel standards, it simplifies the LCD
connectivity. The effect of using TC358867XBG is to enable existing baseband devices supporting DSI or
DPI streaming to connect to new panels supporting DisplayPortTM interface and also to connect to existing
panels over longer distance using DisplayPortTM adaptors at far-end.
Features
● Translates MIPI® DSI/DPI Link video stream
from Host to DisplayPortTM Link data to external
display devices.
Supports generic long packets for accessing
the chip’s register set.
Video input data formats:
● The inputs are driven by a DSI Host with 4-Data
Lanes, upto1 Gbps/lane or DPI Host with
16/18/24 bit interface upto154 MHz parallel
clock.
- RGB-565, RGB-666 and RGB-888.
- New DSI V1.02 Data Type Support: 16-bit
YCbCr 422
Interlaced video mode is not supported.
● (Optional) Supports HDCP Digital Content
Protection version 1.3 (DisplayPortTM
amendment Rev1.1).
● DPI Receiver
Up to 16 / 18 / 24 bit parallel data interface.
Maximum speed at 154 MPs (Mpixel per sec).
Video input data formats: RGB-565, RGB-666
and RGB-888.
● Embeds audio information from the I2S port into
the DisplayPortTM data stream.
● The output Interface consists of a DisplayPortTM
Only Progressive mode supported.
Tx with a 2-lane Main Link and AUX-Ch.
● Register Configuration: From DSI link or I2C
● I2S Audio Interface: Supports one I2S port for
audio streaming from the host to
TC358867XBG.
Supports slave mode (BCLK, LRCLK & over-
sampling clock input from Host).
Supports sampling frequencies of 32, 44.1, 48,
88.2, 96, 176.4 & 192 kHz.
Supports up to 2 audio channels.
Supports 16, 18, 20 or 24bits per sample.
Optionally inserts IEC60958 status bits and
preamble bits per channel.
interface.
● Interrupt to host to inform any error status or
status needing attention from Host.
● Internal test pattern (color bar) generator for DP
o/p testing without any video (DSI/DPI) i/p.
● Debug/Test Port: I2C Slave
● DSI Receiver
MIPI® DSI: v1.01 / MIPI® D-PHY: v0.90
Compliant.
Up to four (4) Data Lanes with Bi-direction
support on Data Lane 0.
Maximum speed at 1 Gbps/lane.
Supports Burst as well as Non-Burst Mode
Video Data.
● DisplayPortTM Interface: Supports a
DisplayPortTM link from TC358867XBG to
display panels.
High speed serial bridge chip using VESA®
DisplayPortTM 1.1a Standard.
- Video data packets are limited to one row per
Hsync period.
Supports one dual-lane DisplayPortTM port for
high bandwidth applications
Supports video stream packets for video data
transmission.
Support 1.62 or 2.7 Gbps/lane data rate with
voltage swings @0.4, 0.6, 0.8 or 1.2 V
Support of pre-emphasis levels of 0, 3.5dB and
6dB.
© 2018
1 / 20
2018-05-28
Rev.1.1
Toshiba Electronic Devices & Storage Corporation
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