Datasheet > TC358777XBG

TC358777XBG

更新时间： 2024-11-06 14:56:23

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
21页	464K
描述
tablet / Ultrabook™

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

TC358777XBG 数据手册

TC358770AXBG/TC358777XBG

CMOS Digital Integrated Circuit Silicon Monolithic

TC358770AXBG/TC358777XBG

Mobile Peripheral Devices

TC358770AXBG

Overview

This Functional Specification defines operation of TC358770AXBG /

TC358777XBG chip, which concatenates two DSI^SMstreams of video

packets, one from each DSI link into a single DisplayPort^TMvideo

P-VFBGA100-0505-0.40-001

stream.

Weight: 40 mg (Typ.)

The only difference between TC358770AXBG and TC3587777XBG is

the package size. TC358770AXBG housed in a 5.0 mm by 5.0 mm

size package with 0.4 mm ball pitch. While TC358777XBG housed in

a 7.0 mm by 7.0 mm size package with 0.65 mm ball pitch.

TC358777XBG

TC358770AXBG / TC358777XBG exhibits two independent 4-data

lane DSI receivers and one 4-lane DisplayPort^TMtransmitter. Each

DSI link data lane can receive data up to 1 Gbps/lane, with up to 8

Gbps total input data rate. Each DSI receiver link can activate 0-, 1-,

2-, 3- or 4-data lanes independently. DP main link can toggle bit rate

at either 1.62 or 2.7 Gbps per lane, with maximum output data rate at

P-VFBGA80-0707-0.65-001

Weight: 66 mg (Typ.)

8.64 Gbps. DP transmitter is able to operate with 1-, 2 or 4-lanes in its main link.

The target application is for high resolution DisplayPort^TMpanels, whose bandwidth requirement cannot

be met by a single 4-data lane DSI link @4 Gbps. TC358770AXBG is an ideal bridge chip which

enables application processors, or hosts, with dual DSI links to drive up to 2560 x 2048 x 24 (or 18)

DisplayPort^TMpanels @60fps.

Features

● DisplayPort^TMSource/Transmitter

● TC358770AXBG / TC358777XBG follows the

following standards:

 VESA^®DisplayPort^TMRev 1.1a Standard.

 MIPI^®DSI^SMversion 1.02, Jan 2010.

- Bit Rate @ 1.62 or 2.7 Gbps, Voltage Swing

@0.4, 0.6, 0.8 or 1.2 V, Pre-Emphasis Level

@0, 3.5 or 6dB.

 MIPI^®D-PHY^SMversion 1.0, May 2009.

 VESA^®DisplayPort^TMStandard version 1.1a,

Jan. 11 2008.

- There are four lanes available in DP main Link,

which can operate in 1-, 2- or 4-lane

configuration.

 Digital Content Protection LLC, HDCP version

1.3 with DisplayPort^TMamendment revision 1.1,

Jan. 15 2010.

- AUX channel with nominal bit rate at 1 Mbps.

 After receiving DSI link burst data,

TC358770AXBG / TC358777XBG retimes video

data to DP panel's pixel clock for Synchronous

(to DisplayPort^TMlink symbol clock, LSClk) Clock

Mode operation.

● DSI Receiver

 Dual 4-Data Lane DSI Link with Bi-direction

support at Data Lane 0, it can be used in 1-, 2-,

3- or 4-data lane configuration.

 Maximum speed at 1 Gbps/lane.

 Video input data formats: RGB-565, RGB-666

and RGB-888.

 New DSI V1.02 Data Type, 16-bit YCbCr 422, is

supported.

 Interlaced video mode is not supported.

 Provide path for DSI host/transmitter to control

TC358770AXBG / TC358777XBG and its

attached panel.

 DSI Link High Speed clock, DSIClk or an

external clock, RefClk, is required before

programming TC358770AXBG.

 SSCG with up to 30 kHz modulation to reduce

EMI.

 Built in PRBS7 Generator to test DisplayPort^TM

Link without DSI input.

 Built in Color Bar Generator to verify

DisplayPort^TMprotocol.

 Support HDCP encryption Version 1.3 with

DisplayPort^TMamendment Revision 1.1.

 Secure ASSR (Alternate Scrambler Seed Reset)

support for eDP panels

- System designer connects ASSR_DisablePad

to an inner ring VSS_IO pad, e.g. pad E4, to

enable eDP panels and ASSR

Toshiba Electronic Devices & Storage Corporation

1 / 21

2019-02-07

Rev. 1.63

12 3 4 5 6 7...21

中文翻译

下载PDF

与TC358777XBG相关器件

型号	品牌	获取价格	描述	数据表
TC358778XBG	TOSHIBA	获取价格	CMOS Digital Integrated Circuit Silicon Monolithic
TC358779XBG	TOSHIBA	获取价格	Mobile Peripheral Bridge Chip IC
TC358840XBG	TOSHIBA	获取价格	digital media adapter (DMA) / smart monitor / smart set-top box / smart TV
TC35885TB	TOSHIBA	获取价格	IC MUX/DEMUX, PBGA256, 27 X 27 MM, 1.27 MM PITCH, NON CONDUCTIVE TIE BAR, TBGA-256, ATM/SO
TC358860XBG	TOSHIBA	获取价格	Bridge Chip IC
TC358867XBG	TOSHIBA	获取价格	tablet / Ultrabook™ / information terminal
TC358867XBG(EL)	TOSHIBA	获取价格	Consumer Circuit, CMOS, PBGA80
TC358870XBG	TOSHIBA	获取价格	Mobile Peripheral Bridge Chip IC
TC35894FG	TOSHIBA	获取价格	I/O port expansion
TC35894XBG	TOSHIBA	获取价格	I/O port expansion

与TC358777XBG相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

9
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

TC358777XBG

TC358777XBG 数据手册

与TC358777XBG相关器件

与TC358777XBG相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

TC358777XBG

TC358777XBG 数据手册

与TC358777XBG相关器件

与TC358777XBG相关文章

您还可以找

您在本页遇到什么问题？