TC358779XBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC358779XBG
Mobile Peripheral Devices
TC358779XBG
Overview
The HDMI-RX to MIPI DSI-TX is a bridge device that converts HDMI®
stream to MIPI® DSI while providing de-interlacing and auto-scaling
features.
TC358779XBG share the same 80-pin package as that of TC358749XBG.
P-VFBGA80-0707-0.65-001
Weight: 77mg (Typ.)
Features
● HDMI-RX Interface
HDMI® 1.4b
- Support 16, 18, 20 or 24-bit data (depend on
HDMI® input stream)
- Support Left or Right-justify with MSB first
- Support 32 bit-wide time-slot only
- Output Audio Over Sampling clock (256fs)
- Video Formats Support (Up to 1080P @60fps)
RGB, YCbCr444: 24-bpp @60fps
YCbCr422 24-bpp @60fps
- Audio Supports
Internal Audio PLL to track N/CTS value
transmitted by the ACR packet.
- 3D Support
- HDCP1.3 Support
- EDID Support
Release A, Revision 1 (Feb 9, 2000)
First 128 byte (EDID 1.3 structure)
First E-EDID Extension: 128 bytes of CEA
Extension version 3 (specified in CEA-861-D)
Embedded 1 K-byte SRAM (EDID_SRAM)
- Maximum HDMI® clock speed: 165 MHz
- Support IEC 60958 & 61937 formats
(depending upon HDMI® input stream) over I2S
- Supports HBR audio stream split across 4 I2S
lines if bandwidth higher than 12 MHz
TDM (Time Division Multiplexed) Audio Interface
- Fixed to 8 channels
- Support Master Clock mode only
- Support 16, 18, 20 or 24-bit PCM audio data
word (depend on HDMI® input stream)
- Support 32 bit-wide time slot only
- Output Audio OverSampling clock (256fs)
Digital Audio Interface
- Supports 2 channels (any 2 of the total 8)
(depend on HDMI® input stream)
- Support IEC 60958 & 61937 formats
(depending upon HDMI® input stream)
Does not support Audio Return Path and HDMI®
Ethernet Channels
● DSI TX Interface
MIPI DSI compliant (Version 1.1 22 November
● Video Processing
Input formats accepted:
2011)
Supports up to 4 data lanes @1Gbps/lane
Supports video data formats
- RGB888 or RGB666
● I2C Slave Interface
Support for normal (100 kHz), fast mode (400
kHz) and ultra-fast mode (2 MHz)
Configure all TC358779XBG internal registers
Support 2 I2C Slave Addresses (7’h0F & 7’h1F)
selected through boot-strap pin (INT)
● Audio Output Interface
- RGB or YCbCr422
- Interlaced or Progressive
- 2D or 3D
-
Limited to 165 MHz PClk, 640×480, 720×480,
720×576, 1280×720 or 1920×1080 are
expected when scalar is used
Output formats supported:
- RGB888 or RGB666
- Interlaced (in case of no video processing) or
Progressive
- 2D or 3D
Any of the three audio interfaces are available: I2S,
TDM or IEC60958 (pins are multiplexed)
- Limited by 4Gbps D-PHY bandwidth, 720×480,
1280×720 or 1920×1080 are expected when
scalar is invoked
I2S Audio Interface
- Up to 4 data lanes for 8-channel data
- Support Master Clock mode only
© 2014 Toshiba Corporation
1 / 18
2016-09-01