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TC358762XBG

更新时间: 2024-09-15 20:58:35
品牌 Logo 应用领域
东芝 - TOSHIBA 外围集成电路
页数 文件大小 规格书
22页 554K
描述
Mobile Peripheral Bridge Chip IC

TC358762XBG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:VFBGA,Reach Compliance Code:unknown
风险等级:5.79JESD-30 代码:S-PBGA-B64
长度:5 mm端子数量:64
最高工作温度:85 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装形状:SQUARE封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:1 mm
最大供电电压:1.3 V最小供电电压:1.1 V
标称供电电压:1.2 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

TC358762XBG 数据手册

 浏览型号TC358762XBG的Datasheet PDF文件第2页浏览型号TC358762XBG的Datasheet PDF文件第3页浏览型号TC358762XBG的Datasheet PDF文件第4页浏览型号TC358762XBG的Datasheet PDF文件第5页浏览型号TC358762XBG的Datasheet PDF文件第6页浏览型号TC358762XBG的Datasheet PDF文件第7页 
TC358762XBG  
CMOS Digital Integrated Circuit Silicon Monolithic  
TC358762XBG  
Mobile Peripheral Devices  
TC358762XBG  
Overview  
TC358762XBG chip de-serializes the stream into a parallel one. The parallel  
output bus can be either a DPI or a DBI bus. The usage of either DPI or DBI  
bus is mutually exclusive.  
The DSI host controls/configures TC358762XBG chip via DSI's Generic  
Long Write packets. The host controls (commands) the peripheral display  
device by sending DSI packets to TC358762XBG. TC358762XBG routes  
P-VFBGA64-0505-0.50BZ  
Weight: 41 mg (Typ.)  
the commands either through DBI host, SPI master or DBI-C host interface, I/F, block to the peripheral device.  
TC358762XBG supports both DCS and generic commands. The commands output through these interfaces are  
intended for the peripheral display device to interpret and execute; TC358762XBG does not interpret them, except  
a few DCS commands mentioned explicitly in this document.  
TC358762XBG supports bi-directional DSI link. The host reads TC358762XBG's registers via DSI's Generic  
Read (2 parameter) packets. Host can also access the status registers of peripheral display device attached to  
TC358762XBG by issuing read commands. The read data is returned to host via DSI's reverse direction Low  
Power packets in Data Lane 0.  
Depending on the output I/F ports chosen; TC358762XBG can be configured to operate with various peripheral  
display devices.  
Features  
Programmable output polarity  
Support up to frame size 1366 × 768 at 60 fps  
Standard followed:  
MIPI DSI version 1.01, Feb 2008  
MIPI D-PHY version 0.9, Oct 2007  
MIPI DPI version 2.0, Sep, 2005  
MIPI DBI-2 version 2.00, Nov 2005  
MIPI DCS Command version 1.02, Dec 2008  
DBI Host  
Read/Write Data/Command from the external DBI  
slave device  
Support DCS commands, which is compliant with  
MIPI DBI-B standard  
Support Intel 80xx CPU I/F with either 8-bit or 16-bit  
commands  
Programmable Output Data Format and Bus Width  
● DSI Receiver  
Dual Data Lane DSI Link with Bi-direction support  
at Data Lane 0  
Maximum speed at 800 Mbps/lane  
Video input data formats: RGB-565, RGB-666 and  
RGB-888  
Video input frame rates: Up to 60 fps for WXGA  
(1366 × 768)  
Support various DSI packet types  
Provide the path for DSI host/transmitter to control  
TC358762XBG and its attached Display Device  
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8 bit Bus, RGB 565 (2 cycles/pixel)  
8 bit Bus, RGB 666 (3 cycles/pixel)  
8 bit Bus, RGB 888 (3 cycles/pixel)  
9 bit Bus, RGB 666 (2 cycles/pixel)  
16 bit Bus, RGB 565 (1 cycles/pixel)  
16 bit Bus, RGB 666 (3 cycles/2 pixel) note1  
16 bit Bus, RGB 888 (3 cycles/2 pixel) note1  
18 bit Bus, RGB 666 (1 cycles/pixel)  
24 bit Bus, RGB 888 (1 cycles/pixel)  
Support up to 864×480 at 60 fps (or 1280×720 at  
30 fps)  
DPI Host  
Bus speed up to 75 MHz burst rate with data rate up  
to 216 Mbytes/s  
Support the following pixel formats:  
● SPI Master  
4-pin SPI master I/F, CSX[1:0], CLK, DI and DO  
Support two SPI slaves  
Data Rate up to 10 Mbps  
The main purpose of this port is used to configure  
DPI slave display devices  
Half Duplex data transfer support  
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RGB666 18 bit per pixel  
RGB666 loosely packed 18 bit per pixel  
RGB565 16 bit per pixel  
RGB565 loosely packed 16 bit per pixel  
RGB888 24 bit per pixel  
With the Toshiba Magic Square algorithm, an  
RGB666 18-bit or 16-bit LCD panel can produce  
a display equivalent to that of an RGB888 24-bit  
LCD panel with up to 16-million colors  
© 2014 Toshiba Corporation  
1 / 22  
2016-04-01  

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