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NSVMMUN2231LT1G PDF预览

NSVMMUN2231LT1G

更新时间： 2023-06-19 14:32:10
品牌 Logo 应用领域
安森美 - ONSEMI 开关光电二极管晶体管
页数 文件大小 规格书
10页 139K
描述
NPN Bipolar Digital Transistor (BRT)

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中文翻译

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NSVMMUN2231LT1G 技术参数

是否无铅：不含铅生命周期：Active
包装说明：SMALL OUTLINE, R-PDSO-G3Reach Compliance Code：compliant
风险等级：5.76Is Samacsys：N
其他特性：BUILT IN BIAS RESISTANCE RATIO IS 1最大集电极电流 (IC)：0.1 A
集电极-发射极最大电压：50 V配置：SINGLE WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE)：8JEDEC-95代码：TO-236
JESD-30 代码：R-PDSO-G3JESD-609代码：e3
湿度敏感等级：1元件数量：1
端子数量：3封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极性/信道类型：NPN参考标准：AEC-Q101
表面贴装：YES端子面层：Tin (Sn)
端子形式：GULL WING端子位置：DUAL
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

NSVMMUN2231LT1G 数据手册

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MUN5211T1 Series  
Preferred Devices  
Bias Resistor Transistor  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base−emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the  
SC−70/SOT−323 package which is designed for low power  
surface mount applications.  
http://onsemi.com  
NPN SILICON  
BIAS RESISTOR  
TRANSISTORS  
• Simplifies Circuit Design  
• Reduces Board Space  
PIN 3  
COLLECTOR  
(OUTPUT)  
PIN 1  
BASE  
(INPUT)  
• Reduces Component Count  
R
R
1
• The SC−70/SOT−323 package can be soldered using wave or reflow.  
The modified gull−winged leads absorb thermal stress during  
soldering eliminating the possibility of damage to the die.  
• Available in 8 mm embossed tape and reel. Use the Device Number  
to order the 7 inch/3000 unit reel.  
2
PIN 2  
EMITTER  
(GROUND)  
• Pb−Free Packages are Available  
MARKING DIAGRAM  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Collector−Base Voltage  
Collector−Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
8x  
M
V
V
CBO  
CEO  
SC−70/SOT−323  
CASE 419  
50  
Vdc  
STYLE 3  
I
100  
mAdc  
C
THERMAL CHARACTERISTICS  
Characteristic  
8x  
x
M
= Specific Device Code  
= (See Marking Table)  
= Date Code  
Symbol  
Max  
Unit  
Total Device Dissipation  
P
202 (Note 1)  
310 (Note 2)  
1.6 (Note 1)  
2.5 (Note 2)  
mW  
D
T = 25°C  
A
Derate above 25°C  
mW/°C  
°C/W  
°C/W  
°C  
Thermal Resistance −  
Junction−to−Ambient  
R
q
JA  
618 (Note 1)  
403 (Note 2)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
Thermal Resistance −  
Junction−to−Lead  
R
q
JL  
280 (Note 1)  
332 (Note 2)  
Junction and Storage  
Temperature Range  
T , T  
−55 to +150  
J
stg  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking table  
on page 2 of this data sheet.  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. FR−4 @ Minimum Pad.  
2. FR−4 @ 1.0 x 1.0 inch Pad.  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
November, 2004 − Rev. 6  
MUN5211T1/D  
 
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中文翻译

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