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NSVMMUN2233LT3G PDF预览

NSVMMUN2233LT3G

更新时间: 2024-12-01 11:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 小信号双极晶体管数字晶体管
页数 文件大小 规格书
10页 106K
描述
NPN 双极数字晶体管 (BRT)

NSVMMUN2233LT3G 数据手册

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DTC114EET1 Series  
Bias Resistor Transistor  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base−emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the  
SC−75/SOT−416 package which is designed for low power surface  
mount applications.  
http://onsemi.com  
NPN SILICON  
BIAS RESISTOR TRANSISTORS  
PIN 3  
COLLECTOR  
(OUTPUT)  
Features  
PIN 1  
R1  
Simplifies Circuit Design  
Reduces Board Space  
BASE  
(INPUT)  
R2  
Reduces Component Count  
PIN 2  
The SC−75/SOT−416 Package Can be Soldered Using Wave or  
Reflow  
EMITTER  
(GROUND)  
The Modified Gull−Winged Leads Absorb Thermal Stress During  
Soldering Eliminating the Possibility of Damage to the Die  
Available in 8 mm, 7 inch/3000 Unit Tape & Reel  
MARKING  
DIAGRAM  
Pb−Free Packages are Available  
3
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
SC−75/SOT−416  
CASE 463  
STYLE 1  
xx  
M
Rating  
Collector-Base Voltage  
Symbol  
Value  
50  
Unit  
Vdc  
2
V
CBO  
V
CEO  
1
Collector-Emitter Voltage  
Collector Current  
50  
Vdc  
I
C
100  
mAdc  
xx = Specific Device Code  
M = Date Code  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering, marking, and shipping information in  
THERMAL CHARACTERISTICS  
the package dimensions section on page 2 of this data sheet.  
Rating  
Symbol  
Value  
Unit  
Total Device Dissipation,  
P
D
FR−4 Board (Note 1) @ T = 25°C  
Derate above 25°C  
200  
1.6  
mW  
mW/°C  
A
Thermal Resistance,  
R
600  
°C/W  
q
JA  
Junction−to−Ambient (Note 1)  
Total Device Dissipation,  
P
D
FR−4 Board (Note 2) @ T = 25°C  
Derate above 25°C  
300  
2.4  
mW  
mW/°C  
A
Thermal Resistance,  
Junction−to−Ambient (Note 2)  
R
400  
°C/W  
°C  
q
JA  
Junction and Storage Temperature Range  
T , T  
J
−55 to  
+150  
stg  
1. FR−4 @ Minimum Pad  
2. FR−4 @ 1.0 × 1.0 Inch Pad  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 6  
DTC114EET1/D  

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