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SI3433BDV PDF预览

SI3433BDV

更新时间: 2024-11-05 22:33:51
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
3页 239K
描述
P-Channel 1.8-V (G-S) MOSFET

SI3433BDV 数据手册

 浏览型号SI3433BDV的Datasheet PDF文件第2页浏览型号SI3433BDV的Datasheet PDF文件第3页 
SPICE Device Model Si3433BDV  
Vishay Siliconix  
P-Channel 1.8-V (G-S) MOSFET  
CHARACTERISTICS  
P-Channel Vertical DMOS  
Macro Model (Subcircuit Model)  
Level 3 MOS  
Apply for both Linear and Switching Application  
Accurate over the 55 to 125°C Temperature Range  
Model the Gate Charge, Transient, and Diode Reverse Recovery  
Characteristics  
DESCRIPTION  
The attached spice model describes the typical electrical  
characteristics of the p-channel vertical DMOS. The subcircuit  
model is extracted and optimized over the 55 to 125°C  
temperature ranges under the pulsed 0-V to 5-V gate drive. The  
saturated output impedance is best fit at the gate bias near the  
threshold voltage.  
A novel gate-to-drain feedback capacitance network is used to model  
the gate charge characteristics while avoiding convergence difficulties  
of the switched Cgd model. All model parameter values are optimized  
to provide a best fit to the measured electrical data and are not  
intended as an exact physical interpretation of the device.  
SUBCIRCUIT MODEL SCHEMATIC  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate  
data sheet of the same number for guaranteed specification limits.  
www.vishay.com  
Document Number: 72188  
S-50383Rev. B, 21-Mar-05  
1

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