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RN1108ACT(TPL3) PDF预览

RN1108ACT(TPL3)

更新时间: 2024-11-25 21:12:07
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体管
页数 文件大小 规格书
6页 173K
描述
PRE-BIASED "DIGITAL" TRANSISTOR,50V V(BR)CEO,80MA I(C),SMT

RN1108ACT(TPL3) 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.83
最大集电极电流 (IC):0.08 A最小直流电流增益 (hFE):80
元件数量:1极性/信道类型:NPN
最大功率耗散 (Abs):0.1 W子类别:BIP General Purpose Small Signal
表面贴装:YES晶体管元件材料:SILICON
Base Number Matches:1

RN1108ACT(TPL3) 数据手册

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RN1107ACT ~ RN1109ACT  
TOSHIBA Transistor Silicon NPN Epitaxial Type (PCT process) (Bias Resistor built-in Transistor)  
RN1107ACT, RN1108ACT, RN1109ACT  
Switching, Inverter Circuit, Interface Circuit and  
Unit: mm  
Driver Circuit Applications  
TOP View  
0.6±0.05  
Extra small package(CST3) is applicable for extra high density  
fabrication.  
0.5±0.03  
Incorporating a bias resistor into a transistor reduces the number of parts,  
which enables the manufacture of ever more compact equipment and  
saves assembly cost.  
Complementary to RN2107ACT to RN2109ACT  
0.05±0.03  
0.35±0.02  
Equivalent Circuit and Bias Resistor Values  
0.15±0.03  
C
Type No.  
R1 (kΩ)  
R2 (kΩ)  
1: BASE  
2: EMITTER  
3: COLLECTOR  
RN1107ACT  
RN1108ACT  
RN1109ACT  
10  
22  
47  
47  
47  
22  
R1  
B
CST3  
JEDEC  
JEITA  
E
TOSHIBA  
2-1J1A  
Weight: 0.75 mg (typ.)  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Symbol  
Rating  
Unit  
Collector-base voltage  
V
V
50  
V
V
CBO  
CEO  
RN1107ACT to RN1109ACT  
Collector-emitter voltage  
50  
RN1107ACT  
6
Emitter-base voltage  
V
V
RN1108ACT  
RN1109ACT  
7
15  
EBO  
Collector current  
I
80  
mA  
mW  
°C  
C
Collector power dissipation  
Junction temperature  
Storage temperature range  
P
(Note1)  
100  
C
RN1107ACT to RN1109ACT  
T
150  
j
T
stg  
55 to 150  
°C  
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note1 : Mounted on FR4 board (10 mm × 10 mm × 1 mmt)  
Start of commercial production  
2004-08  
1
2014-03-01  

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