Datasheet > PSMN6R1-40HL

PSMN6R1-40HL

更新时间： 2024-09-15 11:14:19

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
12页	335K
描述
N-channel 40 V, 7.2 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technologyProduction

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PSMN6R1-40HL 数据手册

PSMN6R1-40HL

N-channel 40 V, 7.2 mOhm, logic level MOSFET in LFPAK56D

using TrenchMOS technology

30 September 2022

Product data sheet

1. General description

Dual logic level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package using

TrenchMOS technology.

2. Features and benefits

•

Dual MOSFET

•

Repetitive avalanche rated

High reliability LFPAK56D package

Copper-clip, solder die attach

Qualified to 175 °C

3. Applications

•

Brushless DC motor control

DC-to-DC converters

High-performance synchronous rectification

High performance and high efficiency server power supply

4. Quick reference data

Table 1. Quick reference data

Symbol

V_DS

I_D

Parameter

Conditions

Min

Typ

Max

Unit

drain-source voltage

drain current

25 °C ≤ T_j≤ 175 °C

V_GS= 5 V; T_mb= 25 °C; Fig. 2

[1]

P_tot

total power dissipation T_mb= 25 °C; Fig. 1

junction temperature

T_j

-55

175

°C

Static characteristics FET1 and FET2

R_DSon

drain-source on-state

resistance

V_GS= 5 V; I_D= 10 A; T_j= 25 °C; Fig. 11

7.2

mΩ

V_GS= 5 V; I_D= 10 A; T_j= 175 °C;

Fig. 11

12.1

14.5

Dynamic characteristics FET1 and FET2

Q_GD

gate-drain charge

total gate charge

I_D= 10 A; V_DS= 32 V; V_GS= 5 V;

T_j= 25 °C; Fig. 13; Fig. 14

6.8

Q_G(tot)

22.2

Avalanche ruggedness FET1 and FET2

E_DS(AL)S

non-repetitive drain-

source avalanche

energy

I_D= 40 A; V_sup≤ 40 V; V_GS= 10 V;

T_j(init)= 25 °C; Fig. 4

[2] [3]

125

12 3 4 5 6 7...12

中文翻译

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