Datasheet > SSM3K15FV_07

SSM3K15FV_07

更新时间： 2024-11-11 04:02:43

品牌	Logo	应用领域
东芝 - TOSHIBA		开关
页数	文件大小	规格书
5页	126K
描述
High Speed Switching Applications

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数据手册

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SSM3K15FV_07 数据手册

SSM3K15FV

TOSHIBA Field Effect Transistor Silicon N Channel MOS Type

SSM3K15FV

High Speed Switching Applications

Unit: mm

Analog Switch Applications

1.2±0.05

0.8±0.05

Optimum for high-density mounting in small packages

•

Low on-resistance

: R = 4.0 Ω (max) (@V

= 4 V)

: R = 7.0 Ω (max) (@V

= 2.5 V)

Absolute Maximum Ratings (Ta = 25°C)

Characteristics

Drain-source voltage

Symbol

Rating

Unit

±20

Gate-source voltage

GSS

100

Drain current

Pulse

200

1. Gate

2. Source

3. Drain

Drain power dissipation (Ta = 25°C)

Channel temperature

(Note 1)

150

°C

150

VESM

Storage temperature

stg

−55~150

°C

Note: Using continuously under heavy loads (e.g. the application of

high temperature/current/voltage and the significant change in

temperature, etc.) may cause this product to decrease in the

reliability significantly even if the operating conditions (i.e.

operating temperature/current/voltage, etc.) are within the

absolute maximum ratings.

JEDEC

JEITA

TOSHIBA

2-1L1B

Weight: 0.0015 g (typ.)

Please design the appropriate reliability upon reviewing the

Toshiba Semiconductor Reliability Handbook (“Handling

Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and

estimated failure rate, etc).

Note 1: Total rating, mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 t)

0.5mm

0.45mm

0.4mm

Marking

Equivalent Circuit

D P

Handling Precaution

When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is

protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects

that come into direct contact with devices should be made of anti-static materials.

2007-11-01

12 3 4 5

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