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SSM3J09FUTE85L

更新时间： 2024-11-20 19:52:59
品牌 Logo 应用领域
东芝 - TOSHIBA 开关光电二极管晶体管
页数 文件大小 规格书
5页 211K
描述
200mA, 30V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET

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中文翻译

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SSM3J09FUTE85L 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SMALL OUTLINE, R-PDSO-G3Reach Compliance Code：unknown
ECCN代码：EAR99风险等级：5.83
配置：SINGLE WITH BUILT-IN DIODE AND RESISTOR最小漏源击穿电压：30 V
最大漏极电流 (Abs) (ID)：0.2 A最大漏极电流 (ID)：0.2 A
最大漏源导通电阻：6 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-PDSO-G3元件数量：1
端子数量：3工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：0.15 W子类别：Other Transistors
表面贴装：YES端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

SSM3J09FUTE85L 数据手册

 浏览型号SSM3J09FUTE85L的Datasheet PDF文件第2页浏览型号SSM3J09FUTE85L的Datasheet PDF文件第3页浏览型号SSM3J09FUTE85L的Datasheet PDF文件第4页浏览型号SSM3J09FUTE85L的Datasheet PDF文件第5页 
SSM3J09FU  
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type  
SSM3J09FU  
Management Switch  
Unit: mm  
High Speed Switching Applications  
•
•
Small package  
Low on resistance: R = 2.7 Ω (max) (@V  
= −10 V)  
= −4 V)  
on  
GS  
GS  
: R = 4.2 Ω (max) (@V  
on  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Drain-Source voltage  
Symbol  
Rating  
Unit  
V
−30  
±20  
V
V
DS  
Gate-Source voltage  
V
GSS  
DC  
I
−200  
D
Drain current  
mA  
Pulse  
I
−400  
DP  
Drain power dissipation (Ta = 25°C)  
Channel temperature  
P
(Note 1)  
150  
mW  
°C  
D
T
ch  
150  
JEDEC  
JEITA  
―
Storage temperature  
T
−55 to 150  
°C  
stg  
SC-70  
2-2E1E  
Note:  
Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
TOSHIBA  
Weight: 0.006 g (typ.)  
operating temperature/current/voltage, etc.) are within the absolute maximum ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note 1: Mounted on FR4 board  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 0.6 mm2 × 3) Figure 1.  
Marking  
Equivalent Circuit  
(top view)  
Figure 1: 25.4 mm  
× 25.4 mm × 1.6 t,  
Cu Pad: 0.6 mm2 × 3  
3
3
0.6 mm  
1.0 mm  
D K  
1
2
1
2
Handling Precaution  
When handling individual devices (which are not yet mounting on a circuit board), be sure that the environment is  
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other  
objects that come into direct contact with devices should be made of anti-static materials.  
Start of commercial production  
2000-01  
1
2014-03-01  
12345

中文翻译

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