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SSM3J129TU PDF预览

SSM3J129TU

更新时间: 2024-10-28 06:14:15
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体小信号场效应晶体管开关光电二极管
页数 文件大小 规格书
6页 187K
描述
Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSV)

SSM3J129TU 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-F3
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.7
Is Samacsys:N配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (Abs) (ID):4.6 A
最大漏极电流 (ID):4.6 A最大漏源导通电阻:0.046 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-F3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):1 W认证状态:Not Qualified
子类别:Other Transistors表面贴装:YES
端子形式:FLAT端子位置:DUAL
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

SSM3J129TU 数据手册

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SSM3J129TU  
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSV)  
SSM3J129TU  
Power Management Switch Applications  
High-Speed Switching Applications  
1.5 V drive  
Unit: mm  
Low ON-resistance R = 137mΩ (max) (@V  
= -1.5 V)  
= -1.8 V)  
on  
GS  
R
=
88mΩ (max) (@V  
GS  
on  
2.1±0.1  
1.7±0.1  
R
R
=
=
62mΩ (max) (@V  
46mΩ (max) (@V  
= -2.5 V)  
= -4.5 V)  
on  
GS  
GS  
on  
1
2
Absolute Maximum Ratings (Ta = 25°C)  
3
Characteristic  
Symbol  
Rating  
-20  
Unit  
V
Drain-Source voltage  
V
V
DSS  
Gate-Source voltage  
Drain current  
± 8  
V
GSS  
DC  
I
(Note 1)  
(Note 1)  
(Note 2)  
-4.6  
-9.2  
500  
D
A
Pulse  
I
DP  
P
D
Drain power dissipation  
mW  
t=10s  
1000  
150  
1:Gate  
T
ch  
°C  
°C  
Channel temperature  
2:Source  
3:Drain  
T
stg  
Storage temperature range  
55 to 150  
UFM  
Note: Using continuously under heavy loads (e.g. the application of high  
temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the absolute  
maximum ratings.  
JEDEC  
JEITA  
TOSHIBA  
2-2U1A  
Weight: 6.6mg (typ.)  
Please design the appropriate reliability upon reviewing the  
Toshiba  
Semiconductor  
Reliability  
Handbook  
(“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure rate, etc).  
Note 1: The junction temperature should not exceed 150°C during use.  
Note 2: Mounted on an FR4 board. (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2)  
Marking  
Equivalent Circuit (top view)  
3
3
JJE  
1
2
1
2
1
2008-09-30  

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