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SSM3J117TU(TE85L)

更新时间： 2024-10-28 14:36:03
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
5页 106K
描述
MOSFETs Vds=-30V Id=-2A 3Pin

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中文翻译

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SSM3J117TU(TE85L) 技术参数

生命周期：ActiveReach Compliance Code：unknown
风险等级：5.55Base Number Matches：1

SSM3J117TU(TE85L) 数据手册

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SSM3J117TU  
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type  
SSM3J117TU  
High-Speed Switching Applications  
•
4 V drive  
Unit: mm  
•
Low ON-resistance:  
R
R
= 225 mΩ (max) (@V  
= −4 V)  
on  
GS  
2.1±0.1  
1.7±0.1  
= 117 mΩ (max) (@V  
= −10 V)  
on  
GS  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristic  
Drain–source voltage  
Symbol  
Rating  
Unit  
1
V
−30  
± 20  
V
V
DS  
3
2
Gate–source voltage  
V
GSS  
DC  
I
−2  
D
Drain current  
A
Pulse  
I
−4  
DP  
P
P
800  
D (Note 1)  
D (Note 2)  
Drain power dissipation  
Channel temperature  
mW  
500  
T
150  
°C  
°C  
ch  
Storage temperature range  
T
−55 to 150  
stg  
1: Gate  
Note:  
Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure  
rate, etc).  
2: Source  
3: Drain  
UFM  
JEDEC  
JEITA  
―
―
TOSHIBA  
2-2U1A  
Weight: 6.6 mg (typ.)  
Note 1: Mounted on a ceramic board.  
(25.4 mm × 25.4 mm × 0.8 t, Cu Pad: 645 mm2 )  
Note 2: Mounted on an FR4 board.  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2 )  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Symbol  
Test Condition  
Min  
Typ.  
⎯
Max  
Unit  
V
I
I
= −1 mA, V  
= −1 mA, V  
= 0  
−30  
−15  
⎯
⎯
⎯
(BR) DSS  
(BR) DSX  
D
D
GS  
Drain–source breakdown voltage  
V
V
= +20 V  
⎯
GS  
Drain cutoff current  
I
V
V
V
V
= −30 V, V  
= ±16 V, V  
= 0  
= 0  
⎯
−1  
μA  
μA  
V
DSS  
GSS  
DS  
GS  
DS  
DS  
GS  
DS  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
⎯
⎯
±1  
V
= −5 V, I = −1 mA  
−1.2  
1.6  
⎯
⎯
−2.6  
⎯
th  
D
⏐Y ⏐  
= −5 V, I =− 1 A  
(Note 3)  
(Note 3)  
(Note 3)  
3.1  
80  
S
fs  
D
I
I
= −1 A, V  
= −10 V  
117  
225  
⎯
D
D
GS  
Drain–source ON-resistance  
R
mΩ  
DS (ON)  
= −0.5 A, V  
= −4 V  
⎯
160  
280  
80  
GS  
Input capacitance  
C
V
V
V
= −15 V, V  
= −15 V, V  
= −15 V, V  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
⎯
pF  
pF  
pF  
iss  
DS  
DS  
DS  
GS  
GS  
GS  
Output capacitance  
C
⎯
⎯
oss  
Reverse transfer capacitance  
C
⎯
45  
⎯
rss  
on  
Turn-on time  
Switching time  
t
t
V
V
= −15 V, I = −1 A,  
⎯
16  
⎯
DD  
GS  
D
ns  
V
= 0 to −4 V, R = 10 Ω  
⎯
⎯
Turn-off time  
35  
G
off  
⎯
Drain–source forward voltage  
Note 3: Pulse test  
V
I
= 2 A, V = 0 V  
GS  
(Note 3)  
0.8  
1.2  
DSF  
D
1
2007-11-01  
12345

中文翻译

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