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SSM3J115TU PDF预览

SSM3J115TU

更新时间: 2024-11-20 03:51:11
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体开关小信号场效应晶体管光电二极管
页数 文件大小 规格书
6页 140K
描述
Field-Effect Transistor Silicon P-Channel MOS Type High-Speed Switching Applications Power Management Switch Applications

SSM3J115TU 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:SMALL OUTLINE, R-PDSO-F3
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.35
Is Samacsys:N外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:20 V
最大漏极电流 (Abs) (ID):2.2 A最大漏极电流 (ID):2.2 A
最大漏源导通电阻:0.193 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-F3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):0.8 W认证状态:Not Qualified
子类别:Other Transistors表面贴装:YES
端子形式:FLAT端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

SSM3J115TU 数据手册

 浏览型号SSM3J115TU的Datasheet PDF文件第2页浏览型号SSM3J115TU的Datasheet PDF文件第3页浏览型号SSM3J115TU的Datasheet PDF文件第4页浏览型号SSM3J115TU的Datasheet PDF文件第5页浏览型号SSM3J115TU的Datasheet PDF文件第6页 
SSM3J115TU  
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type  
SSM3J115TU  
High-Speed Switching Applications  
Power Management Switch Applications  
Unit: mm  
1.5 V drive  
Low ON-resistance:  
R
R
= 353 m(max) (@V  
= 193 m(max) (@V  
= 125 m(max) (@V  
= 1.5 V)  
= 1.8 V)  
= 2.5 V)  
= 4.0 V)  
2.1±0.1  
1.7±0.1  
on  
GS  
GS  
GS  
on  
R
on  
R
on  
=
98 m(max) (@V  
GS  
1
2
Absolute Maximum Ratings (Ta = 25°C)  
3
Characteristic  
Symbol  
Rating  
Unit  
Drain-source voltage  
V
20  
± 8  
2.2  
4.4  
800  
V
V
DS  
Gate-source voltage  
Drain current  
V
GSS  
DC  
I
D
A
Pulse  
I
DP  
P
P
D (Note 1)  
D (Note 2)  
Drain power dissipation  
Channel temperature  
mW  
500  
T
150  
°C  
°C  
ch  
1: Gate  
Storage temperature range  
T
55~150  
stg  
2: Source  
3: Drain  
Note:  
Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure  
rate, etc).  
UFM  
JEDEC  
JEITA  
TOSHIBA  
2-2U1A  
Weight: 6.6 mg (typ.)  
Note 1: Mounted on a ceramic board.  
(25.4 mm × 25.4 mm × 0.8 mm, Cu Pad: 645 mm2)  
Note 2: Mounted on an FR4 board.  
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2)  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Symbol  
Test Conditions  
Min  
Typ.  
Max  
Unit  
V
I
I
= −1 mA, V  
= −1 mA, V  
= 0  
20  
12  
(BR) DSS  
(BR) DSX  
D
D
GS  
Drain-source breakdown voltage  
V
V
= +8 V  
GS  
Drain cutoff current  
I
V
V
V
V
= −20 V, V = 0  
GS  
10  
μA  
μA  
V
DSS  
DS  
GS  
DS  
DS  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
= ±8 V, V = 0  
0.3  
2.7  
±1  
1.0  
GSS  
DS  
V
= −3 V, I = −1 mA  
th  
D
Y ⏐  
= −3 V, I = − 0.9 A  
5.4  
77  
S
fs  
D
(Note 3)  
(Note 3)  
I
= −1.0 A, V  
= −4.0 V  
98  
D
GS  
Drain-source ON-resistance  
mΩ  
I
I
I
= −1.0 A, V  
= −1.0 A, V  
= −0.1 A, V  
= −2.5 V  
= −1.8 V  
= −1.5 V  
84  
125  
193  
353  
D
D
D
GS  
GS  
GS  
(Note 3)  
(Note 3)  
(Note 3)  
R
DS (ON)  
111  
126  
Input capacitance  
C
V
V
V
= −10 V, V  
= −10 V, V  
= −10 V, V  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
568  
75  
pF  
pF  
iss  
DS  
DS  
DS  
GS  
GS  
GS  
Output capacitance  
C
oss  
pF  
Reverse transfer capacitance  
C
67  
rss  
on  
Turn-on time  
t
t
29  
V
V
= −10 V, I = −0.9 A,  
D
= 0~2.5 V, R = 4.7 Ω  
DD  
GS  
Switching time  
ns  
V
G
Turn-off time  
Drain-source forward voltage  
Note 3: Pulse test  
39  
off  
V
I
= 2.2 A, V  
= 0 V  
0.8  
1.2  
DSF  
D
GS  
(Note 3)  
1
2007-11-01  

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