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SSM3J109TU PDF预览

SSM3J109TU

更新时间： 2024-11-20 03:51:11
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体开关晶体管场效应晶体管
页数 文件大小 规格书
5页 201K
描述
Field-Effect Transistor Silicon P-Channel MOS Type Power Management Switch Applications High-Speed Switching Applications

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中文翻译

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SSM3J109TU 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：SMALL OUTLINE, R-PDSO-F3
针数：3Reach Compliance Code：unknown
ECCN代码：EAR99风险等级：5.73
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：20 V
最大漏极电流 (Abs) (ID)：2 A最大漏极电流 (ID)：2 A
最大漏源导通电阻：0.3 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-PDSO-F3元件数量：1
端子数量：3工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：0.8 W认证状态：Not Qualified
子类别：Other Transistors表面贴装：YES
端子形式：FLAT端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

SSM3J109TU 数据手册

 浏览型号SSM3J109TU的Datasheet PDF文件第2页浏览型号SSM3J109TU的Datasheet PDF文件第3页浏览型号SSM3J109TU的Datasheet PDF文件第4页浏览型号SSM3J109TU的Datasheet PDF文件第5页 
SSM3J109TU  
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type  
SSM3J109TU  
○Power Management Switch Applications  
○High-Speed Switching Applications  
Unit: mm  
2.1±0.1  
•
1.8 V drive  
•
Low ON-resistance: Ron = 300 mΩ (max) (@VGS = -1.8 V)  
1.7±0.1  
Ron = 172 mΩ (max) (@VGS = -2.5 V)  
Ron = 130 mΩ (max) (@VGS = -4.0 V)  
1
2
Absolute Maximum Ratings (Ta = 25˚C)  
3
Characteristic  
Drain-source voltage  
Symbol  
Rating  
Unit  
V
-20  
± 8  
-2  
V
V
DS  
Gate-source voltage  
V
GSS  
DC  
I
D
Drain current  
A
Pulse  
I
-4  
DP  
P
P
(Note 1)  
D
D
800  
500  
1. Gate  
2. Source  
3. Drain  
Drain power dissipation  
mW  
(Note 2)  
Channel temperature  
Storage temperature  
T
ch  
150  
°C  
°C  
T
stg  
−55~150  
UFM  
Note: Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
JEDEC  
JEITA  
―
―
TOSHIBA  
2-2U1A  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure rate,  
etc).  
Weight: 6.6 mg (typ.)  
Note 1: Mounted on a ceramic board  
(25.4 mm × 25.4 mm × 0.8 t, Cu Pad: 645 mm2)  
Note 2: Mounted on an FR4 board  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2)  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
V
V
I
I
= -1 mA, V  
= -1 mA, V  
= 0  
-20  
-12  
⎯
⎯
⎯
⎯
⎯
⎯
(BR) DSS  
(BR) DSX  
D
D
GS  
GS  
Drain-source breakdown voltage  
V
= +8 V  
Drain cutoff current  
I
V
V
V
V
= -20 V, V  
= 0  
-10  
μA  
μA  
V
DSS  
DS  
GS  
DS  
DS  
GS  
= 0  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
= ±8 V, V  
⎯
-0.3  
2.4  
⎯
⎯
⎯
4
±1  
-1.0  
⎯
GSS  
DS  
V
= -3 V, I = -1 mA  
th  
D
⏐Y ⏐  
= -3 V, I = -1 A  
(Note 3)  
(Note 3)  
S
fs  
D
I
= -1.0 A, V  
= -4 V  
91  
130  
D
GS  
Drain-source ON-resistance  
R
mΩ  
DS (ON)  
I
I
= -0.5 A, V  
= -0.2 A, V  
= -2.5 V  
= -1.8 V  
(Note 3)  
(Note 3)  
⎯
⎯
123  
175  
172  
300  
D
D
GS  
GS  
Input capacitance  
C
V
V
= -10 V, V  
= -10 V, V  
= -10 V, V  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
⎯
⎯
⎯
⎯
335  
70  
⎯
⎯
⎯
⎯
⎯
1.2  
pF  
pF  
iss  
DS  
DS  
DS  
GS  
GS  
GS  
Output capacitance  
C
oss  
pF  
Reverse transfer capacitance  
C
t
V
V
V
56  
rss  
= -10 V, I = -1A,  
Turn-on time  
Switching time  
20  
DD  
GS  
D
on  
off  
ns  
V
Turn-off time  
= 0 ~ -2.5 V, R = 4.7 Ω  
t
20  
G
⎯
⎯
Drain-source forward voltage  
Note 3: Pulse test  
V
I
= 2 A, V = 0  
GS  
(Note 3)  
0.85  
DSF  
D
1
2007-11-01  
12345

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