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SSM3J113TU(TE85L)

更新时间： 2024-10-28 14:31:15
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
6页 133K
描述
MOSFETs Vds=-20V Id=-1.7A 3Pin

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中文翻译

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SSM3J113TU(TE85L) 技术参数

生命周期：ActiveReach Compliance Code：unknown
风险等级：5.57Base Number Matches：1

SSM3J113TU(TE85L) 数据手册

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SSM3J113TU  
TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type  
SSM3J113TU  
High Speed Switching Applications  
•
2.0V drive  
Unit: mm  
•
Low on-resistance:  
R
on  
R
on  
R
on  
= 449mΩ (max) (@V  
= 249mΩ (max) (@V  
= 169mΩ (max) (@V  
= −2.0 V)  
= −2.5 V)  
= −4.0 V)  
GS  
GS  
GS  
2.1±0.1  
1.7±0.1  
Absolute Maximum Ratings (Ta = 25°C)  
1
2
Characteristic  
Drain-Source voltage  
Symbol  
Rating  
Unit  
3
V
−20  
± 12  
V
V
DS  
Gate-Source voltage  
V
GSS  
DC  
I
−1.7  
−3.4  
D
Drain current  
A
Pulse  
I
DP  
P
P
800  
D (Note 1)  
D (Note 2)  
Drain power dissipation  
Channel temperature  
mW  
500  
T
150  
°C  
°C  
ch  
Storage temperature range  
T
−55~150  
stg  
1: Gate  
Note:  
Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure  
rate, etc).  
2: Source  
3: Drain  
UFM  
JEDEC  
JEITA  
―
―
TOSHIBA  
2-2U1A  
Weight: 6.6 mg (typ.)  
Note 1: Mounted on ceramic board.  
(25.4 mm × 25.4 mm × 0.8 mm, Cu Pad: 645 mm2 )  
Note 2: Mounted on FR4 board.  
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2 )  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Symbol  
Test Conditions  
Min  
Typ.  
Max  
Unit  
V
V
V
I
I
= −1 mA, V  
= −1 mA, V  
= 0  
−20  
−8  
⎯
⎯
⎯
⎯
⎯
−1  
(BR) DSS  
(BR) DSX  
D
D
GS  
Drain-Source breakdown voltage  
= +12V  
GS  
Drain cut-off current  
I
V
V
V
V
= −20 V, V = 0  
GS  
⎯
μA  
μA  
V
DSS  
DS  
GS  
DS  
DS  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
= ±12V, V = 0  
⎯
−0.5  
1.3  
⎯
⎯
⎯
±1  
−1.1  
⎯
GSS  
DS  
V
= −3 V, I = −0.1 mA  
th  
D
⏐Y ⏐  
= −3 V, I =− 0.65 A  
(Note3)  
(Note3)  
2.7  
129  
S
fs  
D
I
= −0.65 A, V  
= −4.0 V  
169  
D
GS  
Drain-Source on-resistance  
R
mΩ  
DS (ON)  
I
I
= −0.65 A, V  
= −0.65 A, V  
= −2.5 V  
= −2.0 V  
(Note3)  
(Note3)  
⎯
⎯
189  
249  
249  
449  
D
D
GS  
GS  
Input capacitance  
C
V
V
V
= −10 V, V  
= −10 V, V  
= −10 V, V  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
⎯
⎯
⎯
⎯
⎯
⎯
370  
116  
73  
⎯
⎯
⎯
⎯
pF  
pF  
iss  
DS  
DS  
DS  
GS  
GS  
GS  
Output capacitance  
C
oss  
pF  
ns  
V
Reverse transfer capacitance  
C
rss  
on  
Turn-on time  
Switching time  
t
t
33  
V
V
= −10 V, I = −0.65 A,  
D
DD  
GS  
= 0~−2.5 V, R = 4.7 Ω  
G
Turn-off time  
47  
⎯
off  
Drain-Source forward voltage  
Note3: Pulse test  
V
I
= 1.7 A, V = 0 V  
GS  
(Note3)  
0.77  
1.2  
DSF  
D
1
2007-11-01  
123456

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