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SI7452DP-T1-E3 PDF预览

SI7452DP-T1-E3

更新时间: 2024-02-25 05:43:46
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
6页 93K
描述
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET

SI7452DP-T1-E3 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.83
配置:Single最大漏极电流 (Abs) (ID):11.5 A
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-609代码:e3
湿度敏感等级:1最高工作温度:150 °C
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):5.4 W
子类别:FET General Purpose Power表面贴装:YES
端子面层:Matte Tin (Sn)Base Number Matches:1

SI7452DP-T1-E3 数据手册

 浏览型号SI7452DP-T1-E3的Datasheet PDF文件第2页浏览型号SI7452DP-T1-E3的Datasheet PDF文件第3页浏览型号SI7452DP-T1-E3的Datasheet PDF文件第4页浏览型号SI7452DP-T1-E3的Datasheet PDF文件第5页浏览型号SI7452DP-T1-E3的Datasheet PDF文件第6页 
Si7452DP  
Vishay Siliconix  
N-Channel 60-V (D-S) Fast Switching MOSFET  
FEATURES  
PRODUCT SUMMARY  
Halogen-free According to IEC 61249-2-21  
Available  
VDS (V)  
RDS(on) (Ω)  
ID (A)  
Qg (Typ.)  
0.0083 at VGS = 10 V  
60  
19.3  
105  
TrenchFET® Power MOSFET  
New Low Thermal Resistance PowerPAK®  
Package with Low 1.07 mm Profile  
100 % Rg Tested  
High Threshold Voltage At High Temperature  
PowerPAK SO-8  
S
6.15 mm  
5.15 mm  
1
S
D
2
S
3
G
4
D
8
D
G
7
D
6
D
5
S
Bottom View  
N-Channel MOSFET  
Ordering Information: Si7452DP-T1-E3 (Lead (Pb)-free)  
Si7452DP-T1-GE3 (Lead (Pb)-free and Halogen-free)  
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted  
A
Parameter  
Symbol  
10 s  
Steady State  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
60  
60  
V
VGS  
20  
TA = 25 °C  
A = 70 °C  
19.3  
15.5  
11.5  
9.2  
Continuous Drain Current (TJ = 150 °C)a  
ID  
T
Pulsed Drain Current  
Continuous Source Current (Diode Conduction)a  
Avalanche Current  
IDM  
IS  
A
4.5  
1.6  
IAS  
EAS  
40  
80  
Avalanche Energy  
mJ  
W
TA = 25 °C  
TA = 70 °C  
5.4  
3.4  
1.9  
1.2  
Maximum Power Dissipationa  
PD  
TJ, Tstg  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)b,c  
- 55 to 150  
260  
°C  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Typical  
18  
Maximum  
Unit  
t 10 s  
Steady State  
Steady State  
23  
65  
Maximum Junction-to-Ambienta  
RthJA  
52  
°C/W  
RthJC  
Maximum Junction-to-Case (Drain)  
1.0  
1.3  
Notes:  
a. Surface Mounted on 1" x 1" FR4 board.  
b. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper  
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not  
required to ensure adequate bottom side solder interconnection.  
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.  
Document Number: 72972  
S09-0273-Rev. D, 16-Feb-09  
www.vishay.com  
1

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