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MMDF2C02HDR2 PDF预览

MMDF2C02HDR2

更新时间: 2024-01-09 01:50:57
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 开关脉冲光电二极管晶体管
页数 文件大小 规格书
12页 354K
描述
Power Field-Effect Transistor, 3.8A I(D), 20V, 0.09ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8

MMDF2C02HDR2 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:SMALL OUTLINE, R-PDSO-G8Reach Compliance Code:unknown
风险等级:5.63其他特性:LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas):405 mJ配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (Abs) (ID):3.8 A
最大漏极电流 (ID):3.8 A最大漏源导通电阻:0.09 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-G8
JESD-609代码:e0元件数量:2
端子数量:8工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:N-CHANNEL AND P-CHANNEL最大功率耗散 (Abs):2 W
最大脉冲漏极电流 (IDM):19 A认证状态:Not Qualified
子类别:Other Transistors表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子位置:DUAL晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

MMDF2C02HDR2 数据手册

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Order this document  
by MMDF2C02HD/D  
SEMICONDUCTOR TECHNICAL DATA  
Medium Power Surface Mount Products  
Motorola Preferred Device  
COMPLEMENTARY  
DUAL TMOS POWER FET  
2.0 AMPERES  
MiniMOS devices are an advanced series of power MOSFETs  
which utilize Motorola’s High Cell Density HDTMOS process.  
TheseminiaturesurfacemountMOSFETsfeatureultralowR  
20 VOLTS  
DS(on)  
and true logic level performance. They are capable of withstanding  
high energy in the avalanche and commutation modes and the  
drain–to–source diode has a very low reverse recovery time.  
MiniMOS devices are designed for use in low voltage, high speed  
switching applications where power efficiency is important. Typical  
applications are dc–dc converters, and power management in  
portable and battery powered products such as computers,  
printers, cellular and cordless phones. They can also be used for  
low voltage motor controls in mass storage products such as disk  
drives and tape drives. The avalanche energy is specified to  
eliminate the guesswork in designs where inductive loads are  
switched and offer additional safety margin against unexpected  
voltage transients.  
R
= 0.090 OHM  
DS(on)  
(N–CHANNEL)  
= 0.160 OHM  
R
DS(on)  
(P–CHANNEL)  
D
N–Channel  
G
CASE 751–05, Style 14  
SO–8  
S
Ultra Low R  
Battery Life  
Provides Higher Efficiency and Extends  
DS(on)  
D
P–Channel  
1
2
3
4
8
7
6
5
N–Drain  
N–Drain  
P–Drain  
P–Drain  
Logic Level Gate Drive — Can Be Driven by Logic ICs  
Miniature SO–8 Surface Mount Package — Saves Board Space  
Diode Is Characterized for Use In Bridge Circuits  
Diode Exhibits High Speed, With Soft Recovery  
Avalanche Energy Specified  
N–Source  
N–Gate  
P–Source  
P–Gate  
G
Mounting Information for SO–8 Package Provided  
Top View  
S
(1)  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Drain–to–Source Voltage  
Symbol  
Value  
20  
Unit  
Vdc  
Vdc  
Vdc  
A
V
DSS  
Gate–to–Source Voltage  
V
GS  
± 20  
20  
Drain–to–Gate Voltage (R  
GS  
= 1.0 m)  
N–Channel  
V
DGR  
Drain Current — Continuous  
I
D
3.8  
3.3  
19  
P–Channel  
N–Channel  
P–Channel  
— Pulsed  
I
DM  
20  
Operating and Storage Temperature Range  
(2)  
T , T  
stg  
– 55 to 150  
2.0  
°C  
Watts  
mJ  
J
Total Power Dissipation @ T = 25°C  
P
D
A
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
J
(V  
DD  
(V  
DD  
= 20 V, V  
= 20 V, V  
= 5.0 V, Peak I = 9.0 A, L = 10 mH, R = 25 )  
N–Channel  
P–Channel  
405  
324  
GS  
GS  
L
G
G
= 5.0 V, Peak I = 6.0 A, L = 18 mH, R = 25 )  
L
(2)  
Thermal Resistance — Junction to Ambient  
R
62.5  
260  
°C/W  
°C  
θJA  
Maximum Lead Temperature for Soldering, 0.0625from case. Time in Solder Bath is 10 seconds.  
T
L
DEVICE MARKING  
D2C02  
(1) Negative signs for P–Channel device omitted for clarity.  
(2) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max.  
ORDERING INFORMATION  
Device  
Reel Size  
Tape Width  
Quantity  
MMDF2C02HDR2  
13″  
12 mm embossed tape  
2500 units  
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
HDTMOS and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Thermal Clad is a trademark of the Bergquist Company.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 5  
Motorola, Inc. 1996  

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