Datasheet > IRG4CF50WB

IRG4CF50WB

更新时间： 2024-11-01 23:58:55

品牌	Logo	应用领域
其他 - ETC		晶体晶体管双极性晶体管栅
页数	文件大小	规格书
1页	32K
描述
TRANSISTOR \| IGBT \| N-CHAN \| 900V V(BR)CES \| CHIP

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中文翻译

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数据手册

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IRG4CF50WB 数据手册

PD-94307

IRG4CF50WB

IRG4CF50WB IGBT Die in Wafer Form

900 V

Size 5

Warp Speed

6" Wafer

Electrical Characteristics ( Wafer Form )

Parameter

V_{CE (on)}

V_(BR)CES

V_GE(th)

I_CES

Description

Guaranteed (Min/Max)

Test Conditions

I_C= 10A, T_J= 25°C, V_GE= 15V

T_J= 25°C, I_CES= 250µA, V_GE= 0V

V_GE= V_CE, T_J=25°C, I_C=250µA

T_J= 25°C, V_CE= 900V

Collector-to-Emitter Saturation Voltage

Collector-to-Emitter Breakdown Voltage

Gate Threshold Voltage

3.11V Max.

900V Min.

3.0V Min., 6.0V Max.

250 µA Max.

Zero Gate Voltage Collector Current

Gate-to-Emitter Leakage Current

I_GES

± 1.1 µA Max.

T_J= 25°C, V_GE= +/- 20V

Mechanical Data

Norminal Backmetal Composition, Thickness:

Norminal Front Metal Composition, Thickness:

Dimensions:

Cr-Ni-Ag ( 1kA-2kA-.2.5kA )

99% Al, 1% Si (4 microns)

0.257" x 0.260"

Wafer Diameter:

150mm, with std. < 100 > flat

.015" + / -.003"

Wafer thickness:

Relevant Die Mechanical Dwg. Number

MinimumStreetWidth

01-5270

100 Microns

Reject Ink Dot Size

0.25mmDiameterMinimum

Consistent throughout same wafer lot

Store in original container, in dessicated

nitrogen, with no contamination

For optimum electrical results, die attach

temperature should not exceed 300C

Ink Dot Location

Recommended Storage Environment:

Recommended Die Attach Conditions

Reference Standard IR packaged part (for design) : IRG4PF50W (When available)

Die Outline

8/29/01

中文翻译

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