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FQI17P10 PDF预览

FQI17P10

更新时间: 2024-11-17 22:23:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 677K
描述
100V P-Channel MOSFET

FQI17P10 数据手册

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TM  
QFET  
FQB17P10 / FQI17P10  
100V P-Channel MOSFET  
General Description  
Features  
These P-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for low voltage applications such as audio amplifier,  
high efficiency switching DC/DC converters, and DC motor  
control.  
-16.5A, -100V, R  
= 0.19@V = -10 V  
DS(on) GS  
Low gate charge ( typical 30 nC)  
Low Crss ( typical 100 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
175°C maximum junction temperature rating  
D
D
G
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
S
G D S  
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB17P10 / FQI17P10  
Units  
V
V
I
Drain-Source Voltage  
-100  
-16.5  
-11.7  
-66  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
580  
mJ  
A
-16.5  
10  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
AR  
dv/dt  
-6.0  
Power Dissipation (T = 25°C) *  
3.75  
P
A
D
Power Dissipation (T = 25°C)  
100  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.67  
W/°C  
°C  
T , T  
-55 to +175  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
1.5  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
40  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2002 Fairchild Semiconductor Corporation  
Rev. B, August 2002  

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