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FQI17P06 PDF预览

FQI17P06

更新时间: 2024-11-03 22:09:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 692K
描述
60V P-Channel MOSFET

FQI17P06 数据手册

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May 2001  
TM  
QFET  
FQB17P06 / FQI17P06  
60V P-Channel MOSFET  
General Description  
Features  
These P-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand a high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for low voltage applications such as automotive,  
DC/DC converters, and high efficiency switching for power  
management in portable and battery operated products.  
-17A, -60V, R  
= 0.12@V = -10 V  
DS(on) GS  
Low gate charge ( typical 21 nC)  
Low Crss ( typical 80 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
175°C maximum junction temperature rating  
S
!
D
G!  
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
D
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB17P06 / FQI17P06  
Units  
V
V
I
Drain-Source Voltage  
-60  
-17  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
-12  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
-68  
A
DM  
V
E
I
Gate-Source Voltage  
± 25  
300  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
-17  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
7.9  
mJ  
V/ns  
W
AR  
dv/dt  
-7.0  
Power Dissipation (T = 25°C) *  
3.75  
79  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.53  
-55 to +175  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
1.9  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
40  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2001 Fairchild Semiconductor Corporation  
Rev. A2. May 2001  

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