March 2012
TM
QFET
FQB34P10TM_F085
100V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
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-33.5A, -100V, R
= 0.06Ω @V = -10 V
DS(on) GS
Low gate charge ( typical 85 nC)
Low Crss ( typical 170 pF)
Fast switching
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
100% avalanche tested
Improved dv/dt capability
175°C maximum junction temperature rating
Qualified to AEC Q101
RoHS Compliant
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D
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▶
▲
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D2-PAK
FQB Series
G
S
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D
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQB34P10TM_F085
Units
V
A
A
A
V
I
Drain-Source Voltage
Drain Current
-100
-33.5
-23.5
-134
DSS
- Continuous (T = 25°C)
D
C
- Continuous (T = 100°C)
C
I
(Note 1)
Drain Current
- Pulsed
DM
V
E
I
E
dv/dt
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T = 25°C) *
± 25
V
mJ
A
mJ
V/ns
W
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
2200
-33.5
15.5
-6.0
3.75
AR
AR
P
A
D
Power Dissipation (T = 25°C)
155
W
C
- Derate above 25°C
Operating and Storage Temperature Range
1.03
-55 to +175
W/°C
°C
T , T
J
STG
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
T
300
°C
L
Thermal Characteristics
Symbol
Parameter
Typ
--
--
Max
0.97
40
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θJC
θJA
θJA
--
62.5
* When mounted on the minimum pad size recommended (PCB Mount)
©2012 Fairchild Semiconductor Corporation
FQB34P10TM_F085 Rev. C1
1
www.fairchildsemi.com