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FQB2N60TM PDF预览

FQB2N60TM

更新时间: 2024-11-02 12:59:23
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FQB2N60TM 数据手册

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April 2000  
TM  
QFET  
FQB2N60 / FQI2N60  
600V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switch mode power supply.  
2.4A, 600V, R  
= 4.7@V = 10 V  
DS(on) GS  
Low gate charge ( typical 9.0 nC)  
Low Crss ( typical 5.0 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
D
!
"
! "  
"
"
G !  
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
S
Absolute Maximum Ratings  
 
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB2N60 / FQI2N60  
Units  
V
V
I
Drain-Source Voltage  
600  
2.4  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
1.5  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
9.6  
A
DM  
V
E
I
Gate-Source Voltage  
±30  
140  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
2.4  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
6.4  
mJ  
V/ns  
W
AR  
dv/dt  
4.5  
Power Dissipation (T = 25°C) *  
3.13  
64  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.51  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
Units  
°CW  
°CW  
°CW  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
1.95  
40  
θ
θ
θ
JC  
JA  
JA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A, April 2000  

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