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TN5325K1-G PDF预览

TN5325K1-G

更新时间: 2024-09-20 19:48:31
品牌 Logo 应用领域
超科 - SUPERTEX PC输入元件开关光电二极管晶体管
页数 文件大小 规格书
2页 440K
描述
Small Signal Field-Effect Transistor, 0.15A I(D), 250V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-236AB, GREEN PACKAGE-3

TN5325K1-G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOT-23
包装说明:SMALL OUTLINE, R-PDSO-G3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.21.00.95风险等级:7.9
其他特性:LOGIC LEVEL COMPATIBLE, HIGH INPUT IMPEDANCE, LOW THRESHOLD配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:250 V最大漏极电流 (ID):0.15 A
最大漏源导通电阻:7 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss):23 pFJEDEC-95代码:TO-236AB
JESD-30 代码:R-PDSO-G3JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL认证状态:Not Qualified
表面贴装:YES端子面层:Matte Tin (Sn)
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

TN5325K1-G 数据手册

 浏览型号TN5325K1-G的Datasheet PDF文件第2页 
TN5325  
Low Threshold  
N-Channel Enhancement-Mode  
Vertical DMOS FETs  
Ordering Information  
Product marking for SOT-23:  
N3C❋  
Order Number / Package  
BVDSS  
/
RDS(ON)  
VGS(th)  
ID(on)  
BVDGS  
(max)  
(max)  
(min)  
TO-236AB*  
TO-92  
TO-243AA**  
where = 2-week alpha date code  
250V  
7.0  
2.0V  
1.2A  
TN5325K1  
TN5325N3  
TN5325N8  
*
Same as SOT-23. All units shipped on 3,000 piece carrier tape reels.  
** Shipped on 2,000 piece carrier tape and reels.  
Product marking for TO-243AA  
Features  
TN3C❋  
Where=2-weekalphadatecode  
Low threshold – 2.0V max.  
Free from secondary breakdown  
Low power drive requirement  
Low CISS and fast switching speeds  
Excellent thermal stability  
Advanced DMOS Technology  
These enhancement-mode (normally-off) transistors utilize a  
vertical DMOS structure and Supertex’s well-proven silicon-gate  
manufacturing process. This combination produces devices with  
the power handling capabilities of bipolar transistors and with the  
high input impedance and positive temperature coefficient inher-  
ent in MOS devices. Characteristic of all MOS structures, these  
devices are free from thermal runaway and thermally-induced  
secondary breakdown.  
High input impedance and high gain  
Complementary N- and P-channel devices  
Applications  
Logic level interfaces – ideal for TTL and CMOS  
Supertex’s vertical DMOS FETs are ideally suited to a wide range  
of switching and amplifying applications where high breakdown  
voltage, high input impedance, low input capacitance, and fast  
switching speeds are desired.  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Analog switches  
General purpose line drivers  
Telecom switches  
Package Options  
Absolute Maximum Ratings  
Drain-to-Source Voltage  
D
G
BVDSS  
D
G
D
S
Drain-to-Gate Voltage  
BVDGS  
S
S G  
D
Gate-to-Source Voltage  
± 20V  
TO-243AA  
(SOT-89)  
TO-236AB  
(SOT-23)  
TO-92  
Operating and Storage Temperature  
Soldering Temperature*  
-55°C to +150°C  
300°C  
Note: See Package Outline section for dimensions.  
* Distance of 1.6 mm from case for 10 seconds.  
11/12/01  
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability  
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to  
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the  
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.  

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