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SI7900EDN-T1 PDF预览

SI7900EDN-T1

更新时间: 2024-10-30 15:51:15
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
6页 84K
描述
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET

SI7900EDN-T1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:compliant
风险等级:5.84最大漏极电流 (Abs) (ID):6 A
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-609代码:e0
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):3.2 W
子类别:FET General Purpose Power表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)Base Number Matches:1

SI7900EDN-T1 数据手册

 浏览型号SI7900EDN-T1的Datasheet PDF文件第2页浏览型号SI7900EDN-T1的Datasheet PDF文件第3页浏览型号SI7900EDN-T1的Datasheet PDF文件第4页浏览型号SI7900EDN-T1的Datasheet PDF文件第5页浏览型号SI7900EDN-T1的Datasheet PDF文件第6页 
Si7900EDN  
Vishay Siliconix  
Dual N-Channel 20-V (D-S) MOSFET, Common Drain  
FEATURES  
PRODUCT SUMMARY  
D TrenchFETr Power MOSFETS:  
VDS (V)  
rDS(on) (W)  
ID (A)  
1.8-V Rated  
D New PowerPAKr Package  
– Low-Thermal Resistance, RthJC  
– Low 1.07-mm Profile  
D 3000-V ESD Protection  
APPLICATIONS  
0.026 @ V = 4.5 V  
GS  
9
8
7
RoHS  
COMPLIANT  
Available  
0.031 @ V = 2.5 V  
GS  
20  
0.039 @ V = 1.8 V  
GS  
D Protection Switch for 1-2 Li-ion Batteries  
PowerPAK 1212-8  
D
1
D
2
S1  
3.30 mm  
3.30 mm  
1
G1  
1.8 kW  
1.8 kW  
2
S2  
G
G
2
1
3
G2  
4
D
8
D
7
D
6
D
5
S
1
S
2
N-Channel  
Bottom View  
N-Channel  
Ordering Information: Si7900EDN-T1  
Si7900EDN-T1—E3 (Lead (Pb)-Free)  
ABSOLUTE MAXIMUM RATINGS (T = 25_C UNLESS OTHERWISE NOTED)  
A
Parameter  
Symbol  
10 secs  
Steady State  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
V
20  
DS  
V
V
GS  
"12  
T
= 25_C  
= 85_C  
9
6
A
a
Continuous Drain Current (T = 150_C)  
I
J
D
T
A
6.4  
4.3  
A
Pulsed Drain Current  
I
30  
DM  
a
Continuous Source Current (Diode Conduction)  
I
2.9  
3.2  
1.7  
1.4  
1.5  
S
T
= 25_C  
= 85_C  
A
a
Maximum Power Dissipation  
P
W
D
T
A
0.79  
Operating Junction and Storage Temperature Range  
T , T  
–55 to 150  
260  
J
stg  
_C  
b,c  
Soldering Recommendations (Peak Temperature)  
T , T  
J
stg  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Typical  
Maximum  
Unit  
t v 10 sec  
Steady State  
Steady State  
30  
65  
38  
82  
a
Maximum Junction-to-Ambient  
R
thJA  
thJC  
_C/W  
Maximum Junction-to-Case  
R
1.9  
2.4  
Notes  
a. Surface Mounted on 1” x 1” FR4 Board.  
b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not  
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure  
adequate bottom side solder interconnection.  
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.  
Document Number: 71425  
S-51129—Rev. C, 13-Jun-05  
www.vishay.com  
1

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