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SI5915DC-T1 PDF预览

SI5915DC-T1

更新时间: 2024-09-14 22:17:59
品牌 Logo 应用领域
威世 - VISHAY 晶体晶体管
页数 文件大小 规格书
4页 101K
描述
Dual P-Channel 1.8-V (G-S) MOSFET

SI5915DC-T1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:compliant
风险等级:5.83Is Samacsys:N
最大漏极电流 (Abs) (ID):3.4 AFET 技术:METAL-OXIDE SEMICONDUCTOR
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
极性/信道类型:P-CHANNEL最大功率耗散 (Abs):2.1 W
子类别:Other TransistorsBase Number Matches:1

SI5915DC-T1 数据手册

 浏览型号SI5915DC-T1的Datasheet PDF文件第2页浏览型号SI5915DC-T1的Datasheet PDF文件第3页浏览型号SI5915DC-T1的Datasheet PDF文件第4页 
Si5915DC  
Vishay Siliconix  
Dual P-Channel 1.8-V (G-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
D TrenchFETr Power MOSFET  
V
(V)  
r
()  
I (A)  
D
DS  
DS(on)  
D Low Thermal Resistance  
D 40% Smaller Footprint Than TSOP-6  
0.070 @ V = --4.5 V  
-- 4 . 6  
GS  
APPLICATIONS  
-- 8  
0.108 @ V = --2.5 V  
-- 3 . 7  
-- 3 . 0  
GS  
D Load Switch or PA Switch for Portable  
0.162 @ V = --1.8 V  
GS  
Devices  
S
1
S
2
1206-8 ChipFETt  
1
S
1
G
G
2
1
D
1
G
1
D
1
S
2
Marking Code  
DE XX  
D
2
G
2
D
2
Lot Traceability  
and Date Code  
D
D
2
1
Part # Code  
Bottom View  
P-Channel MOSFET  
P-Channel MOSFET  
Ordering Information: Si5915DC-T1  
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)  
Parameter  
Symbol  
5 secs  
Steady State  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
V
-- 8  
DS  
V
V
GS  
8  
T
= 25_C  
= 85_C  
-- 3 . 4  
-- 2 . 5  
-- 4 . 6  
-- 3 . 3  
A
a
Continuous Drain Current (T = 150_C)  
I
D
J
T
A
A
Pulsed Drain Current  
I
-- 1 0  
DM  
a
Continuous Source Current (Diode Conduction)  
I
-- 1 . 8  
2.1  
-- 0 . 9  
1.1  
S
T
= 25_C  
= 85_C  
A
a
Maximum Power Dissipation  
P
W
D
T
A
1.1  
0.6  
Operating Junction and Storage Temperature Range  
T , T  
--55 to 150  
260  
J
stg  
_C  
b, c  
Soldering Recommendations (Peak Temperature)  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Typical  
Maximum  
Unit  
t 5 sec  
Steady State  
Steady State  
50  
90  
30  
60  
110  
40  
a
Maximum Junction-to-Ambient  
R
R
thJA  
thJF  
_C/W  
Maximum Junction-to-Foot (Drain)  
Notes  
a. Surface Mounted on 1” x 1” FR4 Board.  
b. See Reliability Manual for profile. The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation  
process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder intercon-  
nection.  
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.  
Document Number: 70693  
S-21251—Rev. B, 05-Aug-02  
www.vishay.com  
2-1  

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