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SI2329DS PDF预览

SI2329DS

更新时间: 2024-10-14 09:26:11
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
4页 177K
描述
P-Channel 8 V (D-S) MOSFET

SI2329DS 数据手册

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SPICE Device Model Si2329DS  
Vishay Siliconix  
P-Channel 8 V (D-S) MOSFET  
DESCRIPTION  
CHARACTERISTICS  
The attached SPICE model describes the typical electrical  
characteristics of the p-channel vertical DMOS. The  
subcircuit model is extracted and optimized over the - 55 °C  
to + 125 °C temperature ranges under the pulsed 0 V to 5 V  
gate drive. The saturated output impedance is best fit at the  
gate bias near the threshold voltage. A novel gate-to-drain  
feedback capacitance network is used to model the gate  
charge characteristics while avoiding convergence  
difficulties of the switched Cgd model. All model parameter  
values are optimized to provide a best fit to the measured  
electrical data and are not intended as an exact physical  
interpretation of the device.  
• P-Channel Vertical DMOS  
• Macro Model (Subcircuit Model)  
• Level 3 MOS  
• Apply for both Linear and Switching Application  
• Accurate over the - 55 °C to + 125 °C Temperature Range  
• Model the Gate Charge, Transient, and Diode Reverse  
Recovery Characteristics  
SUBCIRCUIT MODEL SCHEMATIC  
D
C
GD  
R
M
1
2
3
DBD  
Gy  
Gx  
+
G
R
G
M
1
ETCV  
C
GS  
S
Note  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product datasheet. Designers should refer  
to the appropriate datasheet of the same number for guaranteed specification limits.  
Document Number: 63225  
S11-1274-Rev. A, 04-Jul-11  
www.vishay.com  
1
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  

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