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NTMSD2P102LR2 PDF预览

NTMSD2P102LR2

更新时间： 2024-11-30 02:57:15
品牌 Logo 应用领域
安森美 - ONSEMI 晶体小信号场效应晶体管开关光电二极管
页数 文件大小 规格书
9页 96K
描述
NTMSD2P102LR2

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中文翻译

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NTMSD2P102LR2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOT包装说明：SMALL OUTLINE, R-PDSO-G8
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99风险等级：5.18
其他特性：LOGIC LEVEL COMPATIBLE配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：20 V最大漏极电流 (Abs) (ID)：2.3 A
最大漏极电流 (ID)：2.3 A最大漏源导通电阻：0.09 Ω
FET 技术：METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss)：175 pF
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
湿度敏感等级：1元件数量：1
端子数量：8工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：240极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：2 W认证状态：Not Qualified
子类别：Other Transistors表面贴装：YES
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：30
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

NTMSD2P102LR2 数据手册

 浏览型号NTMSD2P102LR2的Datasheet PDF文件第2页浏览型号NTMSD2P102LR2的Datasheet PDF文件第3页浏览型号NTMSD2P102LR2的Datasheet PDF文件第4页浏览型号NTMSD2P102LR2的Datasheet PDF文件第5页浏览型号NTMSD2P102LR2的Datasheet PDF文件第6页浏览型号NTMSD2P102LR2的Datasheet PDF文件第7页 
NTMSD2P102LR2  
FETKY™  
Power MOSFET and Schottky Diode  
Dual SO−8 Package  
Features  
• High Efficiency Components in a Single SO−8 Package  
• High Density Power MOSFET with Low R  
,
http://onsemi.com  
DS(on)  
Schottky Diode with Low V  
F
• Logic Level Gate Drive  
MOSFET  
• Independent Pin−Outs for MOSFET and Schottky Die  
Allowing for Flexibility in Application Use  
• Less Component Placement for Board Space Savings  
• SO−8 Surface Mount Package, Mounting Information for SO−8  
Package Provided  
−2.3 AMPERES, −20 VOLTS  
90 mW @ VGS = −4.5 V  
SCHOTTKY DIODE  
2.0 AMPERES, 20 VOLTS  
580 mV @ IF = 2.0 A  
• Pb−Free Package is Available  
Applications  
• Power Management in Portable and Battery−Powered Products, i.e.:  
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones  
1
2
8
7
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
A
S
G
C
C
D
D
J
8
Rating  
Symbol  
Value  
−20  
Unit  
V
1
6
Drain−to−Source Voltage  
V
DSS  
SO−8  
3
Gate−to−Source Voltage − Continuous  
V
GS  
"10  
V
CASE 751  
STYLE 18  
4
5
Thermal Resistance, Junction−to−Ambient  
(Note 1)  
R
P
175  
0.71  
−2.3  
−1.45  
−9.0  
°C/W  
W
A
TOP VIEW  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
I
I
A
D
Continuous Drain Current @ T = 100°C  
A
A
MARKING DIAGRAM  
& PIN ASSIGNMENTS  
A
D
Pulsed Drain Current (Note 4)  
I
DM  
Thermal Resistance, Junction−to−Ambient  
(Note 2)  
1
2
8
7
Anode  
Anode  
R
P
I
105  
1.19  
−2.97  
−1.88  
−12  
°C/W  
W
A
A
A
Cathode  
Cathode  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
A
D
3
4
6
5
Continuous Drain Current @ T = 100°C  
I
A
D
Drain  
Drain  
Source  
Gate  
Pulsed Drain Current (Note 4)  
I
DM  
Thermal Resistance, Junction−to−Ambient  
(Note 3)  
R
P
I
62.5  
2.0  
−3.85  
−2.43  
−15  
°C/W  
W
A
A
A
(Top View)  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
A
D
E2P102 = Device Code  
Continuous Drain Current @ T = 100°C  
I
A
D
A
Y
= Assembly Location  
Pulsed Drain Current (Note 4)  
I
DM  
= Year  
Operating and Storage Temperature Range T , T  
−55 to +150  
350  
°C  
WW  
G
= Work Week  
= Pb−Free Package  
J
stg  
Single Pulse Drain−to−Source Avalanche  
E
AS  
mJ  
Energy − Starting T = 25°C  
J
(V = −20 Vdc, V = −4.5 Vdc,  
DD  
GS  
ORDERING INFORMATION  
Peak I = −5.0 Apk, L = 28 mH, R = 25 W)  
L
G
Maximum Lead Temperature for Soldering  
Purposes, 1/8″ from Case for 10 Seconds  
T
L
260  
°C  
†
Device  
Package  
Shipping  
NTMSD2P102LR2  
NTMSD2P102LR2G  
SO−8  
2500/Tape & Reel  
2500/Tape & Reel  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Minimum FR−4 or G−10 PCB, Steady State.  
SO−8  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single  
sided), Steady State.  
3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single  
sided), t ≤ 10 seconds.  
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
May, 2006− Rev. 3  
NTMSD2P102LR2/D  
 
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