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NTMSD3P102R2/D

更新时间： 2024-02-02 00:50:12
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
12页 129K
描述
FETKY?

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中文翻译

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NTMSD3P102R2/D 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOT
包装说明：LEAD FREE, CASE 751-07, SOP-8针数：8
Reach Compliance Code：compliantECCN代码：EAR99
风险等级：5.32配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：20 V最大漏极电流 (Abs) (ID)：2.34 A
最大漏极电流 (ID)：2.34 A最大漏源导通电阻：0.085 Ω
FET 技术：METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss)：135 pF
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
湿度敏感等级：3元件数量：1
端子数量：8工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：2 W认证状态：Not Qualified
子类别：Other Transistors表面贴装：YES
端子面层：Tin (Sn)端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

NTMSD3P102R2/D 数据手册

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NTMSD3P102R2  
Product Preview  
FETKY  
P–Channel Enhancement–Mode  
Power MOSFET and Schottky Diode  
Dual SO–8 Package  
http://onsemi.com  
Features  
• High Efficiency Components in a Single SO–8 Package  
MOSFET  
–3.05 AMPERES  
–20 VOLTS  
• High Density Power MOSFET with Low R  
,
DS(on)  
Schottky Diode with Low V  
F
• Independent Pin–Outs for MOSFET and Schottky Die  
Allowing for Flexibility in Application Use  
• Less Component Placement for Board Space Savings  
0.085 W @ V  
= –10 V  
GS  
• SO–8 Surface Mount Package,  
Mounting Information for SO–8 Package Provided  
Applications  
• DC–DC Converters  
• Low Voltage Motor Control  
SCHOTTKY DIODE  
1.0 AMPERES  
20 VOLTS  
• Power Management in Portable and Battery–Powered Products, i.e.:  
470 mV @ I = 1.0 A  
F
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones  
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
1
2
8
7
A
A
S
G
C
C
D
D
Drain–to–Source Voltage  
V
DSS  
–20  
V
V
8
Gate–to–Source Voltage – Continuous  
V
GS  
"20  
6
1
Thermal Resistance –  
Junction–to–Ambient (Note 1.)  
Total Power Dissipation @ T = 25°C  
Continuous Drain Current @ T = 25°C  
Continuous Drain Current @ T = 70°C  
Pulsed Drain Current (Note 4.)  
3
R
P
D
171  
0.73  
–2.34  
–1.87  
–8.0  
°C/W  
W
A
A
A
θJA  
SO–8  
CASE 751  
STYLE 18  
4
5
A
I
I
A
A
D
D
TOP VIEW  
I
DM  
MARKING DIAGRAM  
& PIN ASSIGNMENTS  
Thermal Resistance –  
Junction–to–Ambient (Note 2.)  
Total Power Dissipation @ T = 25°C  
Continuous Drain Current @ T = 25°C  
Continuous Drain Current @ T = 70°C  
Pulsed Drain Current (Note 4.)  
R
P
100  
1.25  
–3.05  
–2.44  
–12  
°C/W  
W
A
A
A
θJA  
D
A
1
2
8
7
I
I
Anode  
Anode  
Source  
Gate  
Cathode  
Cathode  
Drain  
A
A
D
D
E3P102  
LYWW  
I
3
4
6
5
DM  
Thermal Resistance –  
Junction–to–Ambient (Note 3.)  
Total Power Dissipation @ T = 25°C  
Continuous Drain Current @ T = 25°C  
Continuous Drain Current @ T = 70°C  
Pulsed Drain Current (Note 4.)  
Drain  
R
P
D
62.5  
2.0  
–3.86  
–3.10  
–15  
°C/W  
W
A
A
A
θJA  
(Top View)  
A
I
I
A
A
D
D
E3P102 = Device Code  
I
L
Y
WW  
= Assembly Location  
DM  
T , T  
= Year  
Operating and Storage  
Temperature Range  
–55 to  
+150  
°C  
J
stg  
= Work Week  
Single Pulse Drain–to–Source Avalanche  
E
AS  
140  
mJ  
Energy – Starting T = 25°C (V  
DD  
GS  
–7.5 Apk, L = 5 mH, R = 25 Ω)  
=
J
ORDERING INFORMATION  
–20 Vdc, V  
= –4.5 Vdc, Peak I =  
L
G
Device  
Package  
Shipping  
Maximum Lead Temperature for Soldering  
Purposes, 1/8″ from case for 10 seconds  
T
L
260  
°C  
NTMSD3P102R2  
SO–8  
2500/Tape & Reel  
1. Minimum FR–4 or G–10 PCB, Steady State.  
2. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State.  
3. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds.  
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.  
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
January, 2001 – Rev. 0  
NTMSD3P102R2/D  
1234567...12

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