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NTMSD3P102R2SG

更新时间： 2024-11-18 03:28:11

品牌	Logo	应用领域
安森美 - ONSEMI		晶体肖特基二极管晶体管开关光电二极管
页数	文件大小	规格书
9页	179K
描述
P-Channel Enhancement-Mode Power MOSFET and Schottky Diode Dual Dual SO-8 Package

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技术参数
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NTMSD3P102R2SG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOT
包装说明：	LEAD FREE, CASE 751-07, SOP-8	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
风险等级：	5.32	配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	20 V	最大漏极电流 (Abs) (ID)：	2.34 A
最大漏极电流 (ID)：	2.34 A	最大漏源导通电阻：	0.085 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR	最大反馈电容 (Crss)：	135 pF
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e3
湿度敏感等级：	3	元件数量：	1
端子数量：	8	工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	极性/信道类型：	P-CHANNEL
最大功率耗散 (Abs)：	2 W	认证状态：	Not Qualified
子类别：	Other Transistors	表面贴装：	YES
端子面层：	Tin (Sn)	端子形式：	GULL WING
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING	晶体管元件材料：	SILICON
Base Number Matches：	1

NTMSD3P102R2SG 数据手册

NTMSD3P102R2

FETKY™

P−Channel Enhancement−Mode

Power MOSFET and Schottky Diode

Dual SO−8 Package

Features

• High Efficiency Components in a Single SO−8 Package

http://onsemi.com

• High Density Power MOSFET with Low R_DS(on)

Schottky Diode with Low V_F

MOSFET

−3.05 AMPERES

−20 VOLTS

• Independent Pin−Outs for MOSFET and Schottky Die

Allowing for Flexibility in Application Use

• Less Component Placement for Board Space Savings

0.085 W @ V = −10 V

• SO−8 Surface Mount Package,

Mounting Information for SO−8 Package Provided

SCHOTTKY DIODE

1.0 AMPERE

20 VOLTS

• Pb−Free Packages are Available

Applications

• DC−DC Converters

470 mV @ I = 1.0 A

• Low Voltage Motor Control

• Power Management in Portable and Battery−Powered Products,

i.e.: Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones

MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted).

Rating

Symbol Value

Unit

Drain−to−Source Voltage

−20

DSS

Gate−to−Source Voltage − Continuous

"20

(TOP VIEW)

Thermal Resistance −

Junction−to−Ambient (Note 1)

171

0.73

−2.34

−1.87

−8.0

°C/W

MARKING DIAGRAM &

PIN ASSIGNMENT

Total Power Dissipation @ T = 25°C

Continuous Drain Current @ T = 25°C

Continuous Drain Current @ T = 70°C

Pulsed Drain Current (Note 4)

Thermal Resistance −

E3P1xx

AYWW G

Junction−to−Ambient (Note 2)

100

1.25

−3.05

−2.44

−12

°C/W

Total Power Dissipation @ T = 25°C

SO−8

Continuous Drain Current @ T = 25°C

CASE 751

STYLE 18

Continuous Drain Current @ T = 70°C

Pulsed Drain Current (Note 4)

Thermal Resistance −

E3P1 = Device Code

Junction−to−Ambient (Note 3)

62.5

2.0

−3.86

−3.10

−15

°C/W

= 02 or S

= Assembly Location

= Year

= Work Week

= Pb−Free Package

Total Power Dissipation @ T = 25°C

Continuous Drain Current @ T = 25°C

Continuous Drain Current @ T = 70°C

Pulsed Drain Current (Note 4)

Operating and Storage Temperature Range

T , T

−55 to

+150

°C

stg

(Note: Microdot may be in either location)

Single Pulse Drain−to−Source Avalanche

140

Energy − Starting T = 25°C

ORDERING INFORMATION

(V = −20 Vdc, V = −4.5 Vdc,

Peak I = −7.5 Apk, L = 5 mH, R = 25 W)

†

Device

Package

Shipping

Maximum Lead Temperature for Soldering

260

°C

Purposes, 1/8″ from case for 10 seconds

NTMSD3P102R2

SO−8

2500/Tape & Reel

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Minimum FR−4 or G−10 PCB, Steady State.

NTMSD3P102R2G

SO−8

(Pb−Free)

NTMSD3P102R2SG

SO−8

(Pb−Free)

2500/Tape & Reel

2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick

single−sided), Steady State.

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

3. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick single

sided), t ≤ 10 seconds.

4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

March, 2006 − Rev. 2

NTMSD3P102R2/D

12 3 4 5 6 7...9

中文翻译

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