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NTMSD2P102LR2_06

更新时间： 2024-01-30 12:25:37
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安森美 - ONSEMI /
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NTMSD2P102LR2

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NTMSD2P102LR2_06 数据手册

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NTMSD2P102LR2  
FETKY™  
Power MOSFET and Schottky Diode  
Dual SO−8 Package  
Features  
• High Efficiency Components in a Single SO−8 Package  
• High Density Power MOSFET with Low R  
,
http://onsemi.com  
DS(on)  
Schottky Diode with Low V  
F
• Logic Level Gate Drive  
MOSFET  
• Independent Pin−Outs for MOSFET and Schottky Die  
Allowing for Flexibility in Application Use  
• Less Component Placement for Board Space Savings  
• SO−8 Surface Mount Package, Mounting Information for SO−8  
Package Provided  
−2.3 AMPERES, −20 VOLTS  
90 mW @ VGS = −4.5 V  
SCHOTTKY DIODE  
2.0 AMPERES, 20 VOLTS  
580 mV @ IF = 2.0 A  
• Pb−Free Package is Available  
Applications  
• Power Management in Portable and Battery−Powered Products, i.e.:  
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones  
1
2
8
7
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
A
S
G
C
C
D
D
J
8
Rating  
Symbol  
Value  
−20  
Unit  
V
1
6
Drain−to−Source Voltage  
V
DSS  
SO−8  
3
Gate−to−Source Voltage − Continuous  
V
GS  
"10  
V
CASE 751  
STYLE 18  
4
5
Thermal Resistance, Junction−to−Ambient  
(Note 1)  
R
P
175  
0.71  
−2.3  
−1.45  
−9.0  
°C/W  
W
A
TOP VIEW  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
I
I
A
D
Continuous Drain Current @ T = 100°C  
A
A
MARKING DIAGRAM  
& PIN ASSIGNMENTS  
A
D
Pulsed Drain Current (Note 4)  
I
DM  
Thermal Resistance, Junction−to−Ambient  
(Note 2)  
1
2
8
7
Anode  
Anode  
R
P
I
105  
1.19  
−2.97  
−1.88  
−12  
°C/W  
W
A
A
A
Cathode  
Cathode  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
A
D
3
4
6
5
Continuous Drain Current @ T = 100°C  
I
A
D
Drain  
Drain  
Source  
Gate  
Pulsed Drain Current (Note 4)  
I
DM  
Thermal Resistance, Junction−to−Ambient  
(Note 3)  
R
P
I
62.5  
2.0  
−3.85  
−2.43  
−15  
°C/W  
W
A
A
A
(Top View)  
q
JA  
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
A
D
E2P102 = Device Code  
Continuous Drain Current @ T = 100°C  
I
A
D
A
Y
= Assembly Location  
Pulsed Drain Current (Note 4)  
I
DM  
= Year  
Operating and Storage Temperature Range T , T  
−55 to +150  
350  
°C  
WW  
G
= Work Week  
= Pb−Free Package  
J
stg  
Single Pulse Drain−to−Source Avalanche  
E
AS  
mJ  
Energy − Starting T = 25°C  
J
(V = −20 Vdc, V = −4.5 Vdc,  
DD  
GS  
ORDERING INFORMATION  
Peak I = −5.0 Apk, L = 28 mH, R = 25 W)  
L
G
Maximum Lead Temperature for Soldering  
Purposes, 1/8″ from Case for 10 Seconds  
T
L
260  
°C  
†
Device  
Package  
Shipping  
NTMSD2P102LR2  
NTMSD2P102LR2G  
SO−8  
2500/Tape & Reel  
2500/Tape & Reel  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Minimum FR−4 or G−10 PCB, Steady State.  
SO−8  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single  
sided), Steady State.  
3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single  
sided), t ≤ 10 seconds.  
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
May, 2006− Rev. 3  
NTMSD2P102LR2/D  
 
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