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NTD50N03R-1 PDF预览

NTD50N03R-1

更新时间: 2024-11-06 02:50:55
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 79K
描述
Power MOSFET

NTD50N03R-1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:CASE 369D-01, DPAK-3针数:3
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.87雪崩能效等级(Eas):20 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:25 V最大漏极电流 (ID):7.8 A
最大漏源导通电阻:0.014 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PSIP-T3JESD-609代码:e0
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:175 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大脉冲漏极电流 (IDM):180 A
认证状态:Not Qualified表面贴装:NO
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON

NTD50N03R-1 数据手册

 浏览型号NTD50N03R-1的Datasheet PDF文件第2页浏览型号NTD50N03R-1的Datasheet PDF文件第3页浏览型号NTD50N03R-1的Datasheet PDF文件第4页浏览型号NTD50N03R-1的Datasheet PDF文件第5页浏览型号NTD50N03R-1的Datasheet PDF文件第6页浏览型号NTD50N03R-1的Datasheet PDF文件第7页 
NTD50N03R  
Power MOSFET  
25 V, 45 A, Single N−Channel, DPAK  
Features  
Planar Technology  
Low R  
to Minimize Conduction Losses  
DS(on)  
http://onsemi.com  
Low Capacitance to Minimize Driver Losses  
Optimized Gate Charge to Minimize Switching Losses  
Pb−Free Packages are Available  
V
R
DS(on)  
TYP  
I MAX  
D
(BR)DSS  
12.5 mW @ 10 V  
19 mW @ 4.5 V  
Applications  
25 V  
45 A  
VCORE DC−DC Buck Converter Applications  
Optimized for High Side Switching  
N−Channel  
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
Symbol  
Value  
Unit  
Drain−to−Source Voltage  
Gate−to−Source Voltage  
Continuous Drain  
V
25  
"20  
9.2  
V
V
A
DSS  
G
V
GS  
T = 25°C  
I
D
A
Current (R  
(Note 1)  
)
q
JA  
S
4
T = 85°C  
A
7.2  
2.1  
Power Dissipation  
(R ) (Note 1)  
T = 25°C  
A
P
W
A
D
D
D
4
q
JA  
4
Continuous Drain  
T = 25°C  
A
I
7.8  
6.0  
1.5  
D
Current (R  
(Note 2)  
)
q
JA  
T = 85°C  
A
2
3
Steady  
State  
1
1
1
2
3
2
Power Dissipation  
(R ) (Note 2)  
T = 25°C  
A
P
I
W
A
3
q
JA  
CASE 369AA  
DPAK  
(Surface Mount) (Straight Lead) (Straight Lead)  
STYLE 2 STYLE 2  
CASE 369D  
DPAK  
CASE 369AC  
3 IPAK  
Continuous Drain  
T
T
T
= 25°C  
= 85°C  
= 25°C  
45  
35  
50  
C
C
C
D
Current (R  
(Note 1)  
)
q
JC  
Power Dissipation  
(R ) (Note 1)  
P
W
A
q
JC  
MARKING DIAGRAMS  
& PIN ASSIGNMENTS  
Pulsed Drain Current  
T = 25°C,  
t = 10 ms  
I
180  
45  
A
DM  
p
4
Current Limited by  
Package  
T = 25°C  
I
A
A
DmaxPkg  
Drain  
4
Operating Junction and Storage  
Temperature  
T , T  
J
55 to  
175  
°C  
stg  
Drain  
Source Current (Body Diode)  
Drain−to−Source (dv/dt)  
I
45  
8.0  
20  
A
S
dv/dt  
V/ns  
mJ  
Single Pulse Drain−to−Source Avalanche  
E
AS  
1
Gate  
3
Energy (T = 25°C, V = 50 V, V = 10 V,  
J
DD  
GS  
2
Source  
I = 6.32 A , L = 1.0 mH, R = 25 W)  
3
1
Gate  
2
L
pk  
G
Drain  
Source  
Drain  
Lead Temperature for Soldering Purposes  
(1/8from case for 10 s)  
T
260  
°C  
L
Y
WW  
= Year  
= Work Week  
T50N03R = Device Code  
= Pb−Free Package  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
G
1. Surface−mounted on FR4 board using 1 sq in pad, 1 oz Cu.  
2. Surface−mounted on FR4 board using the minimum recommended pad size.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
March, 2007 − Rev. 4  
NTD50N03R/D  
 

NTD50N03R-1 替代型号

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