Datasheet > IS61C64AL

IS61C64AL

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
13页	96K
描述
8K x 8 HIGH-SPEED CMOS STATIC RAM

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IS61C64AL 数据手册

IS61C64AL

ISSI

WRITE CYCLE NO. 2(OE is HIGH During Write Cycle) ^(1,2)

ADDRESS

VALID ADDRESS

LOW

PWE1

HZWE

LZWE

HIGH-Z

DATA UNDEFINED

OUT

DATAIN VALID

DIN

CE_WR2.eps

WRITE CYCLE NO. 3(OE is LOW During Write Cycle) ⁽¹⁾

ADDRESS

VALID ADDRESS

LOW

PWE2

HZWE

LZWE

HIGH-Z

DATA UNDEFINED

OUT

DATAIN VALID

DIN

CE_WR3.eps

Notes:

1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if OE

≥ VIH.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

03/16/06

1...5 6 789 10 11...13

下载PDF

与IS61C64AL相关器件

型号	品牌	描述	获取价格	数据表
IS61C64AL_0610	ISSI	8K x 8 HIGH-SPEED CMOS STATIC RAM	获取价格
IS61C64AL-10JI	ISSI	8K x 8 HIGH-SPEED CMOS STATIC RAM	获取价格
IS61C64AL-10JLI	ISSI	8K x 8 HIGH-SPEED CMOS STATIC RAM	获取价格
IS61C64AL-10JLI-TR	ISSI	Standard SRAM, 8KX8, 10ns, CMOS, PDSO28, 0.300 INCH, LEAD FREE, PLASTIC, SOJ-28	获取价格
IS61C64AL-10TI	ISSI	8K x 8 HIGH-SPEED CMOS STATIC RAM	获取价格
IS61C64AL-10TLI	ISSI	8K x 8 HIGH-SPEED CMOS STATIC RAM	获取价格