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IS61C64B PDF预览

IS61C64B

更新时间: 2024-10-28 11:10:59
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
9页 44K
描述
8K x 8 HIGH-SPEED CMOS STATIC RAM

IS61C64B 数据手册

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®
IS61C64B  
8K x 8 HIGH-SPEED CMOS STATIC RAM  
ISSI  
July 2002  
FEATURES  
DESCRIPTION  
The ISSI IS61C64B is a very high-speed, low power,  
8192-wordby8-bitstaticRAM.ItisfabricatedusingISSI'shigh-  
performance CMOS technology. This highly reliable process  
coupled with innovative circuit design techniques, yields ac-  
cess times as fast as 10 ns with low power consumption.  
• High-speed access time: 10, 12, and 15 ns  
• Automatic power-down when chip is  
deselected  
• CMOS low power operation  
— 450 mW (typical) operating  
— 250 µW (typical) standby  
• TTL compatible interface levels  
• Single 5V power supply  
WhenCEisHIGH(deselected),thedeviceassumesastandby  
mode at which the power dissipation can be reduced down to  
250 µW (typical) with CMOS input levels.  
EasymemoryexpansionisprovidedbyusingoneChipEnable  
input, CE. The active LOW Write Enable (WE) controls both  
writing and reading of the memory.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
The IS61C64B is packaged in the JEDEC standard 28-pin,  
300-mil SOJ, and TSOP.  
• One Chip Enables (CE) for increased speed  
FUNCTIONAL BLOCK DIAGRAM  
256 X 256  
MEMORY ARRAY  
A0-A12  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE  
CONTROL  
CIRCUIT  
OE  
WE  
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI  
assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device  
specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. D  
07/01/02  

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