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ICS858020AKLFT PDF预览

ICS858020AKLFT

更新时间: 2024-11-07 04:58:15
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路
页数 文件大小 规格书
14页 149K
描述
LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-CML FANOUT BUFFER

ICS858020AKLFT 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFN
包装说明:3 X 3 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VFQFN-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.45Is Samacsys:N
系列:858020输入调节:DIFFERENTIAL
JESD-30 代码:S-XQCC-N16JESD-609代码:e3
长度:3 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:16实输出次数:4
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.03 ns座面最大高度:1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

ICS858020AKLFT 数据手册

 浏览型号ICS858020AKLFT的Datasheet PDF文件第2页浏览型号ICS858020AKLFT的Datasheet PDF文件第3页浏览型号ICS858020AKLFT的Datasheet PDF文件第4页浏览型号ICS858020AKLFT的Datasheet PDF文件第5页浏览型号ICS858020AKLFT的Datasheet PDF文件第6页浏览型号ICS858020AKLFT的Datasheet PDF文件第7页 
ICS858020  
LOW SKEW, 1-TO-4  
DIFFERENTIAL-TO-CML FANOUT BUFFER  
GENERAL DESCRIPTION  
FEATURES  
The ICS858020 is a high speed 1-to-4 Differential- Four differential CML outputs  
ICS  
HiPerClockS™  
to-CML Fanout Buffer and is a member of the  
One LVPECL differential clock input  
HiPerClockS™family of high performance clock  
solutions from ICS.The ICS858020 is optimized  
for high speed and very low output skew, making  
IN, nIN pair can accept the following differential input  
levels: LVPECL, LVDS, CML, SSTL  
it suitable for use in demanding applications such as SONET,  
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The  
internally terminated differential input and VREF_AC pin allow  
other differential signal families such as LVDS, LVHSTL and  
CML to be easily interfaced to the input with minimal use of  
external components. The ICS858020 is packaged in a small  
3mm x 3mm 16-pin VFQFN package which makes it ideal for  
use in space-constrained applications.  
Maximum output frequency: 3.2GHz  
Output skew: 30ps (maximum)  
Part-to-part skew: 225ps (maximum)  
Additive phase jitter, RMS: <0.03ps (typical)  
Propagation delay: 600ps (maximum)  
Operating voltage supply range:  
VCC = 2.375V to 3.63V, VEE = 0V  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
16 15 14 13  
IN  
VT  
1
2
3
4
12 Q1  
11 nQ1  
10 Q2  
VREF_AC  
Q0  
nQ0  
IN  
VT  
nIN  
9
nQ2  
5
6
7
8
nIN  
Q1  
nQ1  
VREF_AC  
ICS858020  
16-LeadVFQFN  
Q2  
3mm x 3mm x 0.95 package body  
K Package  
nQ2  
TopView  
Q3  
nQ3  
858020AK  
1
REV.A DECEMBER 10, 2007  

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