ICS8624AYLF

更新时间： 2024-11-07 13:00:47

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
16页	177K
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中文翻译

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数据手册

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ICS8624AYLF 数据手册

ICS8624I

LOW SKEW, 1-TO-5

DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER

GENERAL DESCRIPTION

FEATURES

The ICS8624I is

high performance, 1-to-5

• Fully integrated PLL

Differential-to-HSTL zero delay buffer. The ICS8624I

has two selectable clock input pairs. The CLK0,

nCLK0 and CLK1, nCLK1 pair can accept most standard

differential input levels. The VCO operates at a frequency

range of 250MHz to 630MHz. Utilizing one of the outputs

as feedback to the PLL, output frequencies up to 630MHz

can be regenerated with zero delay with respect to the

input. Dual reference clock inputs support reduntant clock

or multiple reference applications..

• Five differential HSTL compatible outputs

• Selectable differential CLKx, nCLKx input pairs

• CLKx, nCLKx pairs can accept the following differential

input levels: LVPECL, LVDS, HSTL, SSTL, HCSL

• Output frequency range: 31.25MHz to 630MHz

• Input frequency range: 31.25MHz to 630MHz

• VCO range: 250MHz to 630MHz

• External feedback for “zero delay” clock regeneration

• Cycle-to-cycle jitter: 35ps (maximum)

• Output skew: 50ps (maximum)

• Static phase offset: 30ps 125ps

• 3.3V core, 1.8V output operating supply

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

BLOCK DIAGRAM

PIN ASSIGNMENT

nQ0

PLL_SEL

nQ1

÷4, ÷8

32 31 30 29 28 27 26 25

CLK0

nCLK0

nQ2

SEL0

SEL1

V^DDO

CLK1

nCLK1

nQ3

CLK0

nQ3

PLL

nCLK0

CLK1

nQ4

CLK_SEL

ICS8624I

nQ2

nCLK1

CLK_SEL

FB_IN

nFB_IN

nQ1

V^DDO

10 11 12 13 14 15 16

SEL0

SEL1

32-Lead LQFP

7mm x 7mm x 1.4mm body package

Y Package

TopView

8624BYI

www.idt.com

REV.C JULY 30, 2010

12 3 4 5 6 7...16

中文翻译

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与ICS8624AYLF相关器件

型号	品牌	获取价格	描述	数据表
ICS8624AYLFT	IDT	获取价格	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM H
ICS8624AYT	IDT	获取价格	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, 7 X 7 MM, 1.4
ICS8624BY	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8624BYI	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8624BYILF	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8624BYILFT	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8624BYIT	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8624BYLF	ICSI	获取价格	LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8624BYLFT	ICSI	获取价格	LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8624BYT	ICSI	获取价格	LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER