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FLL21E040IK PDF预览

FLL21E040IK

更新时间: 2024-11-21 03:37:07
品牌 Logo 应用领域
EUDYNA 晶体晶体管放大器局域网
页数 文件大小 规格书
6页 371K
描述
High Voltage - High Power GaAs FET

FLL21E040IK 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred包装说明:FLANGE MOUNT, R-CDFM-F2
针数:2Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.27
Is Samacsys:N其他特性:HIGH RELIABILITY
外壳连接:SOURCE配置:SINGLE
最小漏源击穿电压:32 VFET 技术:JUNCTION
最高频带:S BANDJESD-30 代码:R-CDFM-F2
元件数量:1端子数量:2
工作模式:DEPLETION MODE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
认证状态:Not Qualified表面贴装:YES
端子形式:FLAT端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:AMPLIFIER
晶体管元件材料:GALLIUM ARSENIDEBase Number Matches:1

FLL21E040IK 数据手册

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FLL21E040IK  
High Voltage - High Power GaAs FET  
FEATURES  
High Voltage Operation : VDS=28V  
High Gain: 15dB(typ.) at Pout=40dBm(Avg.)  
Broad Frequency Range : 2100 to 2200MHz  
Proven Reliability  
DESCRIPTION  
The FLL21E040IK is a high power GaAs FET that offers high efficiency,  
ease of matching, greater consistency and broad bandwidth for high  
power L-band amplifiers. This device is target for high voltage, low  
current operation in digitally modulated base station amplifiers. This  
product is ideally suited for W-CDMA base station amplifiers while  
offering high gain, long term reliability and ease of use.  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
Condition  
Rating  
32  
-3  
83.3  
-65 to +175  
200  
Unit  
V
V
Drain-Source Voltage  
Gate-Source Voltage  
Total Power Dissipation  
Storage Temperature  
Channel Temperature  
VDS  
VGSꢀꢀꢀ Tc=25oCꢀꢀꢀꢀ  
Pt  
Tstg  
Tch  
W
oC  
oC  
RECOMMENDED OPERATING CONDITION (Case Temperature Tc=25oC)  
Item  
DC Input Voltage  
Symbol  
VDS  
Condition  
Limit  
<28  
Unit  
V
Forward Gate Current  
Reverse Gate Current  
Channel Temperature  
IGF  
IGR  
Tch  
RG=2 Ω  
RG=2 Ω  
<176  
>-15.9  
155  
mA  
mA  
oC  
ELECTRICAL CHARACTERISTICS (Case Temperature Tc=25oC)  
Item  
Symbol Condition  
Limit  
min. Typ. Max.  
Unit  
Pinch-Off Voltage  
Vp  
VDS=5V IDS=150mA  
IGS=-1.5mA  
VDS=28V  
IDS(DC)=500mA  
Pout=40dBm(Avg.)  
note  
-0.1  
-5  
-
-0.2  
-
-35  
-0.5  
V
V
dBc  
dB  
%
dBc  
oC/W  
Gate-Source Breakdown Voltage  
3rd Order Intermodulation Distortion  
Power Gain  
Drain Efficiency  
Adjacent Channel Leakage Power Ratio ACLR  
Thermal Resistance Rth  
VGSO  
IM3  
Gp  
-
-31  
-
-
-
14.0 15.0  
ηd  
-
-
-
26  
-36  
1.6  
Channel to Case  
1.8  
Note 1 : IM3 ACLR and Gain test condition as follows:  
IM3 & Gain : fo=2.1325GHz, f1=2.1475GHz W-CDMA(3GPP3.4 12-00) BS-1 64ch  
non clipping modulation measured over 3.84MHz at fo-15MHz and fI+15MHz.  
ACLR : fo=2.1325GHz W-CDMA(3GPP3.4 12-00) BS-1 64ch non clipping modulation,  
measured over 3.84MHz at fo+/-5MHz.  
Edition 1.2  
Mar 2004  
1

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