DATA SHEET
www.onsemi.com
D
S
Transistor - N-Channel,
Logic Level, Enhancement
Mode Field Effect
G
FDN337N
General Description
SUPERSOTt−3 N−Channel logic level enhancement mode power
field effect transistors are produced using onsemi’s proprietary, high
cell density, DMOS technology. This very high density process is
especially tailored to minimize on−state resistance. These devices are
particularly suited for low voltage applications in notebook
computers, portable phones, PCMCIA cards, and other battery
powered circuits where fast switching, and low in−line power loss are
needed in a very small outline surface mount package.
SOT−23−3
CASE 527AG
MARKING DIAGRAM
&E&Y
618&E&G
Features
• 2.2 A, 30 V
♦ R
♦ R
= 0.065 ꢀ @ V = 4.5 V
GS
DS(on)
&E
&Y
618
&G
= Designates Space
= 0.082 ꢀ @ V = 2.5 V
DS(on)
GS
= Binary Calendar Year Coding Scheme
= Specific Device Code
= Date Code
• Industry Standard Outline SOT−23 Surface Mount Package Using
Proprietary SUPERSOT−3 Design for Superior Thermal and
Electrical Capabilities
ORDERING INFORMATION
• High Density Cell Design for Extremely Low R
DS(on)
• Exceptional on−Resistance and Maximum DC Current Capability
• This Device is Pb−Free and Halogen Free
†
Device
FDN337N
Package
Shipping
SOT−23−3
(Pb−Free)
3000 /
Tape & Reel
ABSOLUTE MAXIMUM RATINGS
A
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
T = 25°C unless otherwise noted.
Symbol
Parameter
Ratings
Unit
V
V
Drain−Source Voltage
30
DSS
GSS
V
Gate−Source Voltage − Continuous
Drain/Output Current – Continuous
Drain/Output Current – Pulsed
Maximum Power Dissipation (Note 1a)
Maximum Power Dissipation (Note 1b)
8
2.2
V
I
D
A
10
P
0.5
W
D
0.46
T , T
Operating and Storage Temperature
Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
T = 25°C unless otherwise noted.
A
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance,
Junction−to−Ambient (Note 1a)
250
°C/W
ꢁ
JA
R
Thermal Resistance,
Junction−to−Case (Note 1)
75
°C/W
ꢁ
JC
© Semiconductor Components Industries, LLC, 1998
1
Publication Order Number:
March, 2022 − Rev. 4
FDN337N/D