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74LV07A PDF预览

74LV07A

更新时间: 2024-11-04 04:01:11
品牌 Logo 应用领域
德州仪器 - TI 输出元件驱动
页数 文件大小 规格书
13页 316K
描述
HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS

74LV07A 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢇ ꢈ  
ꢊꢋꢌ ꢍꢎꢏ ꢏ ꢋꢐꢀꢑ ꢒ ꢐꢓ ꢅ ꢋꢐ ꢀ  
ꢔ ꢓꢕ ꢊ ꢖ ꢗꢋꢁ ꢘꢒꢐꢈꢓ ꢁ ꢖ ꢎꢕ ꢗ ꢎꢕꢀ  
SCES337I − MAY 2000 − REVISED JUNE 2006  
SN54LV07A . . . J OR W PACKAGE  
SN74LV07A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
2-V to 5.5-V V  
Operation  
CC  
Typical V  
OLP  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
<0.8 V at V  
CC  
A
1A  
1Y  
2A  
2Y  
3A  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
D
D
D
D
D
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
CC  
OHV  
CC  
OH  
6A  
6Y  
5A  
5Y  
4A  
4Y  
= 3.3 V, T = 25°C  
A
Outputs Are Disabled During Power Up and  
Power Down With Inputs Tied to V  
CC  
Support Mixed-Mode Voltage Operation on  
All Ports  
3Y  
GND  
8
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
SN54LV07A . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
3
2
1 20 19  
18  
6Y  
NC  
5A  
NC  
5Y  
2A  
NC  
2Y  
4
5
6
7
8
description/ordering information  
17  
16  
15  
14  
These hex buffers/drivers are designed for 2-V to  
5.5-V V  
operation.  
NC  
3A  
CC  
The ’LV07A devices perform the Boolean function  
Y = A in positive logic.  
9 10 11 12 13  
The open-drain outputs require pullup resistors to  
perform correctly and can be connected to other  
open-drain outputs to implement active-low  
wired-OR or active-high wired-AND functions.  
NC − No internal connection  
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the  
off  
off  
outputs, preventing damaging current backflow through the devices when they are powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube of 50  
SN74LV07AD  
SOIC − D  
LV07A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV07ADR  
SN74LV07ANSR  
SN74LV07ADBR  
SN74LV07APW  
SN74LV07APWR  
SN74LV07APWT  
SN74LV07ADGVR  
SNJ54LV07AJ  
SOP − NS  
74LV07A  
LV07A  
SSOP − DB  
−40°C to 85°C  
Reel of 2000  
Reel of 250  
Reel of 2000  
Tube of 25  
TSSOP − PW  
LV07A  
TVSOP − DGV  
CDIP − J  
LV07A  
SNJ54LV07AJ  
SNJ54LV07AW  
SNJ54LV07AFK  
−55°C to 125°C  
CFP − W  
Tube of 150  
Tube of 55  
SNJ54LV07AW  
SNJ54LV07AFK  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2006, Texas Instruments Incorporated  
ꢎ ꢁ ꢄꢋꢀꢀ ꢖ ꢕꢊ ꢋꢐꢔ ꢓꢀ ꢋ ꢁ ꢖꢕꢋꢒ ꢙꢚ ꢛꢜ ꢝꢞꢟ ꢠꢡꢢ ꢣꢙ ꢟꢞ ꢣꢙꢤ ꢛꢣꢜ ꢗꢐ ꢖ ꢒ ꢎ ꢥꢕ ꢓꢖ ꢁ  
ꢛꢣ  
ꢜꢙ  
ꢨꢤ ꢧ ꢤ ꢡ ꢢ ꢙ ꢢ ꢧ ꢜ ꢫ  
ꢟꢢ  
ꢜꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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