5秒后页面跳转
74LV07ATPW PDF预览

74LV07ATPW

更新时间: 2024-11-05 11:14:59
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
12页 722K
描述
Hex buffer with open-drain outputsProduction

74LV07ATPW 数据手册

 浏览型号74LV07ATPW的Datasheet PDF文件第2页浏览型号74LV07ATPW的Datasheet PDF文件第3页浏览型号74LV07ATPW的Datasheet PDF文件第4页浏览型号74LV07ATPW的Datasheet PDF文件第5页浏览型号74LV07ATPW的Datasheet PDF文件第6页浏览型号74LV07ATPW的Datasheet PDF文件第7页 
74LV07AT  
Hex buffer with open-drain outputs  
Rev. 1 — 19 December 2016  
Product data sheet  
1. General description  
The 74LV07AT is a hex buffer with open-drain outputs. The outputs are open-drain and  
can be connected to other open-drain outputs to implement active-LOW wired-OR or  
active-HIGH wired-AND functions.  
Designed to operate over a VCC range from 4.5 V to 5.5 V, the inputs are TTL compatible,  
which allows the device to be used to translate from 3.3 V to 5 V.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall  
times.  
This device is fully specified for partial Power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features and benefits  
Direct interface with TTL levels  
Supply voltage range from 4.5 V to 5.5 V  
Typical tPZL of 3.5 ns at 5 V  
Typical VOL(p) < 0.8 V at VCC = 5 V, Tamb = 25 C  
Supports mixed-mode voltage operation on all ports  
IOFF circuitry provides partial Power-down mode operation  
Latch-up performance exceeds 250 mA per JESD 78 Class II  
ESD protection:  
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV  
MM JESD22-A115-A exceeds 150 V  
CDM JESD22-C101E exceeds 2 kV  
Specified from 40 C to +85 C and from 40 C to +125 C  

与74LV07ATPW相关器件

型号 品牌 获取价格 描述 数据表
74LV08 NXP

获取价格

Quad 2-input AND gate
74LV08A DIODES

获取价格

QUADRUPLE 2-INPUT AND GATES
74LV08APW NEXPERIA

获取价格

Quad 2-input AND gateProduction
74LV08AS14-13 DIODES

获取价格

AND Gate, LV/LV-A/LVX/H Series, 4-Func, 2-Input, CMOS, PDSO14, GREEN, SOP-14
74LV08AT14-13 DIODES

获取价格

QUADRUPLE 2-INPUT AND GATES
74LV08D NXP

获取价格

Quad 2-input AND gate
74LV08D NEXPERIA

获取价格

Quad 2-input AND gateProduction
74LV08DB NXP

获取价格

Quad 2-input AND gate
74LV08DB,112 NXP

获取价格

74LV08 - Quad 2-input AND gate SSOP1 14-Pin
74LV08DB,118 NXP

获取价格

74LV08 - Quad 2-input AND gate SSOP1 14-Pin